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Add code for part 1
Signed-off-by: Oguz Meteer <info@guztech.nl>
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part_1/Example1.hs

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-- Check out https://bitlog.it/hardware/a-basic-introduction-to-clash-for-fpga-development/
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-- for the blog post in which we create this file.
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module Example1 where
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import CLaSH.Prelude
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counter val = val + 1
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counter2 val = adder val 1
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counter3 val enable = o
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where
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o = case enable of
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True -> val + 1
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False -> val
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counter4 val enable = o
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where
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o = case enable of
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True -> adder val 1
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False -> val
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adder val1 val2 = val1 + val2
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addsub val1 val2 a_ns = o
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where
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res_add = val1 + val2
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res_sub = val1 - val2
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o = case a_ns of
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True -> res_add
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False -> res_sub
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stack1 (mem, sp) push pop value = ((mem', sp'), o)
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where
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sp' = case push of
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True -> case pop of
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True -> sp
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False -> sp + 1
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False -> case pop of
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True -> sp - 1
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False -> sp
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mem' = case push of
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True -> replace sp value mem
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False -> mem
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o = case pop of
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True -> mem !! sp'
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_ -> 0
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stack2 (mem, sp) push pop value = ((mem', sp'), o)
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where
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(mem', sp') = case push of
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True -> case pop of
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True -> (replace sp value mem, sp)
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False -> (replace sp value mem, sp + 1)
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False -> case pop of
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True -> (mem, sp - 1)
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False -> (mem, sp)
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o = case pop of
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True -> mem !! sp'
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_ -> 0
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topEntity :: (Vec 8 (Signed 16), Unsigned 3) -> Bool -> Bool -> Signed 16 -> ((Vec 8 (Signed 16), Unsigned 3), Signed 16)
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topEntity = stack1
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-- Push 3 on the stack
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x = topEntity (repeat 0, 0) True False 3
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-- Pop one value off of the stack
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y = topEntity (fst x) False True 0
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-- Push and pop at the same time
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z = topEntity (fst x) True True 31

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