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Merge tag 'perf-tools-for-v6.10-1-2024-05-21' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools
Pull perf tools updates from Arnaldo Carvalho de Melo: "General: - Integrate the shellcheck utility with the build of perf to allow catching shell problems early in areas such as 'perf test', 'perf trace' scrape scripts, etc - Add 'uretprobe' variant in the 'perf bench uprobe' tool - Add script to run instances of 'perf script' in parallel - Allow parsing tracepoint names that start with digits, such as 9p/9p_client_req, etc. Make sure 'perf test' tests it even on systems where those tracepoints aren't available - Add Kan Liang to MAINTAINERS as a perf tools reviewer - Add support for using the 'capstone' disassembler library in various tools, such as 'perf script' and 'perf annotate'. This is an alternative for the use of the 'xed' and 'objdump' disassemblers Data-type profiling improvements: - Resolve types for a->b->c by backtracking the assignments until it finds DWARF info for one of those members - Support for global variables, keeping a cache to speed up lookups - Handle the 'call' instruction, dealing with effects on registers and handling its return when tracking register data types - Handle x86's segment based addressing like %gs:0x28, to support things like per CPU variables, the stack canary, etc - Data-type profiling got big speedups when using capstone for disassembling. The objdump outoput parsing method is left as a fallback when capstone fails or isn't available. There are patches posted for 6.11 that to use a LLVM disassembler - Support event group display in the TUI when annotating types with --data-type, for instance to show memory load and store events for the data type fields - Optimize the 'perf annotate' data structures, reducing memory usage - Add a initial 'perf test' for 'perf annotate', checking that a target symbol appears on the output, specifying objdump via the command line, etc Vendor Events: - Update Intel JSON files for Cascade Lake X, Emerald Rapids, Grand Ridge, Ice Lake X, Lunar Lake, Meteor Lake, Sapphire Rapids, Sierra Forest, Sky Lake X, Sky Lake and Snow Ridge X. Remove info metrics erroneously in TopdownL1 - Add AMD's Zen 5 core and uncore events and metrics. Those come from the "Performance Monitor Counters for AMD Family 1Ah Model 00h- 0Fh Processors" document, with events that capture information on op dispatch, execution and retirement, branch prediction, L1 and L2 cache activity, TLB activity, etc - Mark L1D_CACHE_INVAL impacted by errata for ARM64's AmpereOne/ AmpereOneX Miscellaneous: - Sync header copies with the kernel sources - Move some header copies used only for generating translation string tables for ioctl cmds and other syscall integer arguments to a new directory under tools/perf/beauty/, to separate from copies in tools/include/ that are used to build the tools - Introduce scrape script for several syscall 'flags'/'mask' arguments - Improve cpumap utilization, fixing up pairing of refcounts, using the right iterators (perf_cpu_map__for_each_cpu), etc - Give more details about raw event encodings in 'perf list', show tracepoint encoding in the detailed output - Refactor the DSOs handling code, reducing memory usage - Document the BPF event modifier and add a 'perf test' for it - Improve the event parser, better error messages and add further 'perf test's for it - Add reference count checking to 'struct comm_str' and 'struct mem_info' - Make ARM64's 'perf test' entries for the Neoverse N1 more robust - Tweak the ARM64's Coresight 'perf test's - Improve ARM64's CoreSight ETM version detection and error reporting - Fix handling of symbols when using kcore - Fix PAI (Processor Activity Instrumentation) counter names for s390 virtual machines in 'perf report' - Fix -g/--call-graph option failure in 'perf sched timehist' - Add LIBTRACEEVENT_DIR build option to allow building with libtraceevent installed in non-standard directories, such as when doing cross builds - Various 'perf test' and 'perf bench' fixes - Improve 'perf probe' error message for long C++ probe names" * tag 'perf-tools-for-v6.10-1-2024-05-21' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools: (260 commits) tools lib subcmd: Show parent options in help perf pmu: Count sys and cpuid JSON events separately perf stat: Don't display metric header for non-leader uncore events perf annotate-data: Ensure the number of type histograms perf annotate: Fix segfault on sample histogram perf daemon: Fix file leak in daemon_session__control libsubcmd: Fix parse-options memory leak perf lock: Avoid memory leaks from strdup() perf sched: Rename 'switches' column header to 'count' and add usage description, options for latency perf tools: Ignore deleted cgroups perf parse: Allow tracepoint names to start with digits perf parse-events: Add new 'fake_tp' parameter for tests perf parse-events: pass parse_state to add_tracepoint perf symbols: Fix ownership of string in dso__load_vmlinux() perf symbols: Update kcore map before merging in remaining symbols perf maps: Re-use __maps__free_maps_by_name() perf symbols: Remove map from list before updating addresses perf tracepoint: Don't scan all tracepoints to test if one exists perf dwarf-aux: Fix build with HAVE_DWARF_CFI_SUPPORT perf thread: Fixes to thread__new() related to initializing comm ...
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Documentation/ABI/testing/sysfs-bus-event_source-devices-events

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@@ -37,6 +37,12 @@ Description: Per-pmu performance monitoring events specific to the running syste
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performance monitoring event supported by the <pmu>. The name
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of the file is the name of the event.
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As performance monitoring event names are case
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insensitive in the perf tool, the perf tool only looks
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for lower or upper case event names in sysfs to avoid
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scanning the directory. It is therefore required the
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name of the event here is either lower or upper case.
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File contents:
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<term>[=<value>][,<term>[=<value>]]...

MAINTAINERS

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@@ -17541,6 +17541,7 @@ R: Alexander Shishkin <alexander.shishkin@linux.intel.com>
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R: Jiri Olsa <jolsa@kernel.org>
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R: Ian Rogers <irogers@google.com>
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R: Adrian Hunter <adrian.hunter@intel.com>
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R: "Liang, Kan" <kan.liang@linux.intel.com>
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L: linux-perf-users@vger.kernel.org
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L: linux-kernel@vger.kernel.org
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S: Supported

tools/arch/x86/include/asm/cpufeatures.h

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/*
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* Extended auxiliary flags: Linux defined - for features scattered in various
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* CPUID levels like 0x80000022, etc.
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* CPUID levels like 0x80000022, etc and Linux defined features.
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*
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* Reuse free bits when adding new feature flags!
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*/
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#define X86_FEATURE_AMD_LBR_PMC_FREEZE (21*32+ 0) /* AMD LBR and PMC Freeze */
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#define X86_FEATURE_CLEAR_BHB_LOOP (21*32+ 1) /* "" Clear branch history at syscall entry using SW loop */
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#define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control available */
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#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */
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#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
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/*
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* BUG word(s)
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#define X86_BUG_SRSO X86_BUG(1*32 + 0) /* AMD SRSO bug */
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#define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */
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#define X86_BUG_RFDS X86_BUG(1*32 + 2) /* CPU is vulnerable to Register File Data Sampling */
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#define X86_BUG_BHI X86_BUG(1*32 + 3) /* CPU is affected by Branch History Injection */
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#endif /* _ASM_X86_CPUFEATURES_H */

tools/arch/x86/include/asm/msr-index.h

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#define SPEC_CTRL_SSBD BIT(SPEC_CTRL_SSBD_SHIFT) /* Speculative Store Bypass Disable */
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#define SPEC_CTRL_RRSBA_DIS_S_SHIFT 6 /* Disable RRSBA behavior */
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#define SPEC_CTRL_RRSBA_DIS_S BIT(SPEC_CTRL_RRSBA_DIS_S_SHIFT)
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#define SPEC_CTRL_BHI_DIS_S_SHIFT 10 /* Disable Branch History Injection behavior */
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#define SPEC_CTRL_BHI_DIS_S BIT(SPEC_CTRL_BHI_DIS_S_SHIFT)
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/* A mask for bits which the kernel toggles when controlling mitigations */
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#define SPEC_CTRL_MITIGATIONS_MASK (SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD \
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| SPEC_CTRL_RRSBA_DIS_S)
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| SPEC_CTRL_RRSBA_DIS_S \
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| SPEC_CTRL_BHI_DIS_S)
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#define MSR_IA32_PRED_CMD 0x00000049 /* Prediction Command */
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#define PRED_CMD_IBPB BIT(0) /* Indirect Branch Prediction Barrier */
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* are restricted to targets in
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* kernel.
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*/
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#define ARCH_CAP_BHI_NO BIT(20) /*
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* CPU is not affected by Branch
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* History Injection.
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*/
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#define ARCH_CAP_PBRSB_NO BIT(24) /*
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* Not susceptible to Post-Barrier
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* Return Stack Buffer Predictions.

tools/include/linux/bits.h

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#include <linux/const.h>
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#include <vdso/bits.h>
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#include <uapi/linux/bits.h>
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#include <asm/bitsperlong.h>
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#define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG))
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#define GENMASK_INPUT_CHECK(h, l) 0
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#endif
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#define __GENMASK(h, l) \
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(((~UL(0)) - (UL(1) << (l)) + 1) & \
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(~UL(0) >> (BITS_PER_LONG - 1 - (h))))
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#define GENMASK(h, l) \
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(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
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#define __GENMASK_ULL(h, l) \
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(((~ULL(0)) - (ULL(1) << (l)) + 1) & \
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(~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
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#define GENMASK_ULL(h, l) \
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(GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))
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tools/include/uapi/asm-generic/bitsperlong.h

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#endif
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#endif
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#ifndef __BITS_PER_LONG_LONG
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#define __BITS_PER_LONG_LONG 64
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#endif
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#endif /* _UAPI__ASM_GENERIC_BITS_PER_LONG */

tools/include/uapi/asm-generic/fcntl.h

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tools/include/uapi/linux/bits.h

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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/* bits.h: Macros for dealing with bitmasks. */
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#ifndef _UAPI_LINUX_BITS_H
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#define _UAPI_LINUX_BITS_H
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#define __GENMASK(h, l) \
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(((~_UL(0)) - (_UL(1) << (l)) + 1) & \
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(~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
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#define __GENMASK_ULL(h, l) \
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(((~_ULL(0)) - (_ULL(1) << (l)) + 1) & \
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(~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
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#endif /* _UAPI_LINUX_BITS_H */

tools/include/uapi/linux/openat2.h

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