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// x86 memory management unit (MMU).
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// Eflags register
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- #define FL_CF 0x00000001 // Carry Flag
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- #define FL_PF 0x00000004 // Parity Flag
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- #define FL_AF 0x00000010 // Auxiliary carry Flag
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- #define FL_ZF 0x00000040 // Zero Flag
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- #define FL_SF 0x00000080 // Sign Flag
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- #define FL_TF 0x00000100 // Trap Flag
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#define FL_IF 0x00000200 // Interrupt Enable
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- #define FL_DF 0x00000400 // Direction Flag
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- #define FL_OF 0x00000800 // Overflow Flag
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- #define FL_IOPL_MASK 0x00003000 // I/O Privilege Level bitmask
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- #define FL_IOPL_0 0x00000000 // IOPL == 0
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- #define FL_IOPL_1 0x00001000 // IOPL == 1
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- #define FL_IOPL_2 0x00002000 // IOPL == 2
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- #define FL_IOPL_3 0x00003000 // IOPL == 3
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- #define FL_NT 0x00004000 // Nested Task
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- #define FL_RF 0x00010000 // Resume Flag
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- #define FL_VM 0x00020000 // Virtual 8086 mode
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- #define FL_AC 0x00040000 // Alignment Check
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- #define FL_VIF 0x00080000 // Virtual Interrupt Flag
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- #define FL_VIP 0x00100000 // Virtual Interrupt Pending
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- #define FL_ID 0x00200000 // ID flag
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// Control Register flags
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#define CR0_PE 0x00000001 // Protection Enable
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- #define CR0_MP 0x00000002 // Monitor coProcessor
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- #define CR0_EM 0x00000004 // Emulation
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- #define CR0_TS 0x00000008 // Task Switched
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- #define CR0_ET 0x00000010 // Extension Type
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- #define CR0_NE 0x00000020 // Numeric Errror
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#define CR0_WP 0x00010000 // Write Protect
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- #define CR0_AM 0x00040000 // Alignment Mask
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- #define CR0_NW 0x20000000 // Not Writethrough
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- #define CR0_CD 0x40000000 // Cache Disable
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#define CR0_PG 0x80000000 // Paging
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#define CR4_PSE 0x00000010 // Page size extension
@@ -82,23 +54,11 @@ struct segdesc {
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// Application segment type bits
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#define STA_X 0x8 // Executable segment
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- #define STA_E 0x4 // Expand down (non-executable segments)
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- #define STA_C 0x4 // Conforming code segment (executable only)
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#define STA_W 0x2 // Writeable (non-executable segments)
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#define STA_R 0x2 // Readable (executable segments)
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- #define STA_A 0x1 // Accessed
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// System segment type bits
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- #define STS_T16A 0x1 // Available 16-bit TSS
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- #define STS_LDT 0x2 // Local Descriptor Table
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- #define STS_T16B 0x3 // Busy 16-bit TSS
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- #define STS_CG16 0x4 // 16-bit Call Gate
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- #define STS_TG 0x5 // Task Gate / Coum Transmitions
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- #define STS_IG16 0x6 // 16-bit Interrupt Gate
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- #define STS_TG16 0x7 // 16-bit Trap Gate
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#define STS_T32A 0x9 // Available 32-bit TSS
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- #define STS_T32B 0xB // Busy 32-bit TSS
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- #define STS_CG32 0xC // 32-bit Call Gate
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#define STS_IG32 0xE // 32-bit Interrupt Gate
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#define STS_TG32 0xF // 32-bit Trap Gate
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@@ -124,7 +84,6 @@ struct segdesc {
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#define NPTENTRIES 1024 // # PTEs per page table
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#define PGSIZE 4096 // bytes mapped by a page
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- #define PGSHIFT 12 // log2(PGSIZE)
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#define PTXSHIFT 12 // offset of PTX in a linear address
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#define PDXSHIFT 22 // offset of PDX in a linear address
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@@ -135,12 +94,7 @@ struct segdesc {
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#define PTE_P 0x001 // Present
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#define PTE_W 0x002 // Writeable
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#define PTE_U 0x004 // User
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- #define PTE_PWT 0x008 // Write-Through
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- #define PTE_PCD 0x010 // Cache-Disable
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- #define PTE_A 0x020 // Accessed
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- #define PTE_D 0x040 // Dirty
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#define PTE_PS 0x080 // Page Size
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- #define PTE_MBZ 0x180 // Bits must be zero
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// Address in page table or page directory entry
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#define PTE_ADDR (pte ) ((uint)(pte) & ~0xFFF)
@@ -197,7 +151,7 @@ struct gatedesc {
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uint cs : 16 ; // code segment selector
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uint args : 5 ; // # args, 0 for interrupt/trap gates
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uint rsv1 : 3 ; // reserved(should be zero I guess)
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- uint type : 4 ; // type(STS_{TG, IG32,TG32})
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+ uint type : 4 ; // type(STS_{IG32,TG32})
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uint s : 1 ; // must be 0 (system)
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uint dpl : 2 ; // descriptor(meaning new) privilege level
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uint p : 1 ; // Present
@@ -226,3 +180,6 @@ struct gatedesc {
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}
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#endif
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+
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+ //PAGEBREAK!
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+ // Blank page.
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