Skip to content

Commit 9102afc

Browse files
authored
[WebAssembly] Use the same lowerings for f16x8 as other float vectors. (#127897)
This fixes failures to select the various compare operations that weren't being expanded for f16x8.
1 parent 7c26675 commit 9102afc

File tree

2 files changed

+20
-9
lines changed

2 files changed

+20
-9
lines changed

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

+10-9
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,10 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
121121
setOperationAction(ISD::VACOPY, MVT::Other, Expand);
122122
setOperationAction(ISD::VAEND, MVT::Other, Expand);
123123

124-
for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) {
124+
for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64, MVT::v8f16}) {
125+
if (!Subtarget->hasFP16() && T == MVT::v8f16) {
126+
continue;
127+
}
125128
// Don't expand the floating-point types to constant pools.
126129
setOperationAction(ISD::ConstantFP, T, Legal);
127130
// Expand floating-point comparisons.
@@ -140,18 +143,16 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
140143
// Support minimum and maximum, which otherwise default to expand.
141144
setOperationAction(ISD::FMINIMUM, T, Legal);
142145
setOperationAction(ISD::FMAXIMUM, T, Legal);
143-
// WebAssembly currently has no builtin f16 support.
144-
setOperationAction(ISD::FP16_TO_FP, T, Expand);
145-
setOperationAction(ISD::FP_TO_FP16, T, Expand);
146+
// When experimental v8f16 support is enabled these instructions don't need
147+
// to be expanded.
148+
if (T != MVT::v8f16) {
149+
setOperationAction(ISD::FP16_TO_FP, T, Expand);
150+
setOperationAction(ISD::FP_TO_FP16, T, Expand);
151+
}
146152
setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand);
147153
setTruncStoreAction(T, MVT::f16, Expand);
148154
}
149155

150-
if (Subtarget->hasFP16()) {
151-
setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
152-
setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal);
153-
}
154-
155156
// Expand unavailable integer operations.
156157
for (auto Op :
157158
{ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU,

llvm/test/CodeGen/WebAssembly/half-precision.ll

+10
Original file line numberDiff line numberDiff line change
@@ -172,6 +172,16 @@ define <8 x i1> @compare_oge_v8f16 (<8 x half> %x, <8 x half> %y) {
172172
ret <8 x i1> %res
173173
}
174174

175+
; CHECK-LABEL: compare_ule_v8f16:
176+
; CHECK-NEXT: .functype compare_ule_v8f16 (v128, v128) -> (v128){{$}}
177+
; CHECK-NEXT: f16x8.gt $push[[T0:[0-9]+]]=, $0, $1{{$}}
178+
; CHECK-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}}
179+
; CHECK-NEXT: return $pop[[R]]{{$}}
180+
define <8 x i1> @compare_ule_v8f16 (<8 x half> %x, <8 x half> %y) {
181+
%res = fcmp ule <8 x half> %x, %y
182+
ret <8 x i1> %res
183+
}
184+
175185
; CHECK-LABEL: abs_v8f16:
176186
; CHECK-NEXT: .functype abs_v8f16 (v128) -> (v128)
177187
; CHECK-NEXT: f16x8.abs $push0=, $0

0 commit comments

Comments
 (0)