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[Flang][MLIR] Minor changes based on reviewer feedback
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+27
-30
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1 file changed

+27
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flang/lib/Optimizer/CodeGen/CodeGen.cpp

+27-30
Original file line numberDiff line numberDiff line change
@@ -62,42 +62,35 @@ namespace fir {
6262

6363
// TODO: This should really be recovered from the specified target.
6464
static constexpr unsigned defaultAlign = 8;
65+
static constexpr unsigned defaultAddressSpace = 0u;
6566

6667
/// `fir.box` attribute values as defined for CFI_attribute_t in
6768
/// flang/ISO_Fortran_binding.h.
6869
static constexpr unsigned kAttrPointer = CFI_attribute_pointer;
6970
static constexpr unsigned kAttrAllocatable = CFI_attribute_allocatable;
7071

71-
static inline unsigned getAllocaAddressSpace(mlir::ModuleOp module) {
72-
if (mlir::Attribute addrSpace =
73-
mlir::DataLayout(module).getAllocaMemorySpace())
74-
return addrSpace.cast<mlir::IntegerAttr>().getUInt();
75-
76-
return 0u;
77-
}
78-
79-
static inline unsigned getProgramAddressSpace(mlir::ModuleOp module) {
80-
if (mlir::Attribute addrSpace =
81-
mlir::DataLayout(module).getProgramMemorySpace())
82-
return addrSpace.cast<mlir::IntegerAttr>().getUInt();
83-
84-
return 0u;
85-
}
86-
8772
static inline unsigned
8873
getAllocaAddressSpace(mlir::ConversionPatternRewriter &rewriter) {
8974
mlir::Operation *parentOp = rewriter.getInsertionBlock()->getParentOp();
90-
return parentOp ? ::getAllocaAddressSpace(
91-
parentOp->getParentOfType<mlir::ModuleOp>())
92-
: 0u;
75+
assert(parentOp != nullptr &&
76+
"expected insertion block to have parent operation");
77+
if (auto module = parentOp->getParentOfType<mlir::ModuleOp>())
78+
if (mlir::Attribute addrSpace =
79+
mlir::DataLayout(module).getAllocaMemorySpace())
80+
return llvm::cast<mlir::IntegerAttr>(addrSpace).getUInt();
81+
return defaultAddressSpace;
9382
}
9483

9584
static inline unsigned
9685
getProgramAddressSpace(mlir::ConversionPatternRewriter &rewriter) {
9786
mlir::Operation *parentOp = rewriter.getInsertionBlock()->getParentOp();
98-
return parentOp ? ::getProgramAddressSpace(
99-
parentOp->getParentOfType<mlir::ModuleOp>())
100-
: 0u;
87+
assert(parentOp != nullptr &&
88+
"expected insertion block to have parent operation");
89+
if (auto module = parentOp->getParentOfType<mlir::ModuleOp>())
90+
if (mlir::Attribute addrSpace =
91+
mlir::DataLayout(module).getProgramMemorySpace())
92+
return llvm::cast<mlir::IntegerAttr>(addrSpace).getUInt();
93+
return defaultAddressSpace;
10194
}
10295

10396
static inline mlir::Type getLlvmPtrType(mlir::MLIRContext *context,
@@ -402,11 +395,15 @@ class FIROpConversion : public mlir::ConvertOpToLLVMPattern<FromOp> {
402395
return getBlockForAllocaInsert(op->getParentOp());
403396
}
404397

405-
// Generate an alloca of size 1 for an object of type \p llvmObjectTy.
406-
mlir::Value
407-
genAllocaWithType(mlir::Location loc, mlir::Type llvmObjectTy,
408-
unsigned alignment,
409-
mlir::ConversionPatternRewriter &rewriter) const {
398+
// Generate an alloca of size 1 for an object of type \p llvmObjectTy in the
399+
// allocation address space provided for the architecture in the DataLayout
400+
// specification. If the address space is different from the devices
401+
// program address space we perform a cast. In the case of most architectures
402+
// the program and allocation address space will be the default of 0 and no
403+
// cast will be emitted.
404+
mlir::Value genAllocaAndAddrCastWithType(
405+
mlir::Location loc, mlir::Type llvmObjectTy, unsigned alignment,
406+
mlir::ConversionPatternRewriter &rewriter) const {
410407
auto thisPt = rewriter.saveInsertionPoint();
411408
mlir::Operation *parentOp = rewriter.getInsertionBlock()->getParentOp();
412409
mlir::Block *insertBlock = getBlockForAllocaInsert(parentOp);
@@ -1753,8 +1750,8 @@ struct EmboxCommonConversion : public FIROpConversion<OP> {
17531750
if (isInGlobalOp(rewriter))
17541751
return boxValue;
17551752
mlir::Type llvmBoxTy = boxValue.getType();
1756-
auto alloca =
1757-
this->genAllocaWithType(loc, llvmBoxTy, defaultAlign, rewriter);
1753+
auto alloca = this->genAllocaAndAddrCastWithType(loc, llvmBoxTy,
1754+
defaultAlign, rewriter);
17581755
auto storeOp = rewriter.create<mlir::LLVM::StoreOp>(loc, boxValue, alloca);
17591756
this->attachTBAATag(storeOp, boxTy, boxTy, nullptr);
17601757
return alloca;
@@ -3172,7 +3169,7 @@ struct LoadOpConversion : public FIROpConversion<fir::LoadOp> {
31723169
else
31733170
attachTBAATag(boxValue, boxTy, boxTy, nullptr);
31743171
auto newBoxStorage =
3175-
genAllocaWithType(loc, llvmLoadTy, defaultAlign, rewriter);
3172+
genAllocaAndAddrCastWithType(loc, llvmLoadTy, defaultAlign, rewriter);
31763173
auto storeOp =
31773174
rewriter.create<mlir::LLVM::StoreOp>(loc, boxValue, newBoxStorage);
31783175
attachTBAATag(storeOp, boxTy, boxTy, nullptr);

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