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[SPIR-V] Legalize the llvm.is.fpclass intrinsic #137892

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@Icohedron

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@Icohedron

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LLVM Language Reference: llvm.is.fpclass

The lowering of llvm.is.fpclass depends on the compile-time constant operand i32 <test>.
Valid bits for <test> are defined in an enum named FPClassTest.
The following FPClassTest cases are of interest:

  • FPClassTest::fcInf, FPClassTest::fcNan, FPClassTest::fcFinite, FPClassTest::fcNormal map directly to SPIR-V Ops

The lowering of llvm.is.fpclass to both SPIR-V and DirectX will simplify the codegen for HLSL intrinsics isinf, isnan, and isfinite

SPIRV Ops

  • OpIsInf
  • OpIsNan
  • OpIsNormal
  • OpIsFinite

Note: The SPIRV specification states that the results of these ops depends on the floating-point encoding used. However, there are currently no alternative floating-point encodings listed in the specification.

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    backend:SPIR-VquestionA question, not bug report. Check out https://llvm.org/docs/GettingInvolved.html instead!

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