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Issues list

Reland [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions backend:AArch64 backend:AMDGPU clang:openmp OpenMP related changes to Clang flang:openmp llvm:globalisel llvm:instcombine llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:support llvm:transforms
#137701 opened Apr 28, 2025 by jthackray Loading…
4
release/20.x: [AArch64][SME] Prevent spills of ZT0 when ZA is not enabled backend:AArch64 llvm:ir
#137683 opened Apr 28, 2025 by MacDue Loading… LLVM 20.X Release
1
[clang][amdgpu] Add builtins for raw/struct buffer lds load backend:AMDGPU clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:ir
#137678 opened Apr 28, 2025 by JonChesterfield Loading…
7
[SPIRV] Add intrinsic for OpGenericCastToPtrExplicit backend:SPIR-V llvm:ir
#137626 opened Apr 28, 2025 by Naghasan Loading…
1
[IR] Don't allow values of opaque type backend:WebAssembly backend:X86 llvm:instcombine llvm:ir llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
#137625 opened Apr 28, 2025 by nikic Loading…
7
[IR] Add matchers for remaining FP min/max intrinsics (NFC). llvm:analysis llvm:ir llvm:transforms vectorizers
#137612 opened Apr 28, 2025 by fhahn Loading…
4
LangRef: Clarify nsz on min/max operations for +0.0 vs -0.0 llvm:ir
#137567 opened Apr 28, 2025 by wzssyqa Loading…
3
[AMDGPU] Add a new amdgcn.load.to.lds intrinsic backend:AMDGPU clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:ir mlir:amdgpu mlir:gpu mlir:llvm mlir
#137425 opened Apr 26, 2025 by krzysz00 Loading…
13
Warn on misuse of DiagnosticInfo classes that hold Twines backend:AMDGPU backend:ARM backend:DirectX backend:NVPTX llvm:ir llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
#137397 opened Apr 25, 2025 by bogner Loading…
3
[NFC] Use more isa and isa_and_nonnull instead dyn_cast for predicates backend:AMDGPU backend:WebAssembly clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang:static analyzer clang Clang issues not falling into any other category lld:MachO lld llvm:analysis llvm:ir mlir:affine mlir:amdgpu mlir:arith mlir:async mlir:core MLIR Core Infrastructure mlir:gpu mlir:linalg mlir:llvm mlir:quant mlir:sparse Sparse compiler in MLIR mlir:tosa mlir
#137393 opened Apr 25, 2025 by MaxGraey Loading…
8
[IR] Require that global value initializers are sized llvm:instcombine llvm:ir llvm:transforms
#137358 opened Apr 25, 2025 by nikic Loading…
7
IR: Remove reference counts from ConstantData llvm:ir
#137314 opened Apr 25, 2025 by arsenm Loading…
8
IR: Remove uselist for constantdata backend:AArch64 backend:SPIR-V llvm:analysis llvm:instcombine llvm:ir llvm:transforms
#137313 opened Apr 25, 2025 by arsenm Loading…
1
4
[HLSL] Implement DXILResourceBindingAnalysis backend:DirectX llvm:analysis llvm:ir
#137258 opened Apr 24, 2025 by hekota Loading…
3
[SPIRV] support for extension SPV_INTEL_maximum_registers backend:SPIR-V llvm:ir
#137229 opened Apr 24, 2025 by VishMCW Loading…
2
[RISCV] Removeriscv.segN.load/store in favor of their mask variants backend:RISC-V llvm:ir llvm:transforms
#137045 opened Apr 23, 2025 by mshockwave Loading…
7
[NFC][LLVM][IR] Adopt vadiadic isa<> debuginfo llvm:ir
#137001 opened Apr 23, 2025 by jurahul Loading…
8
[LangRef] No target-specific size limit for atomics llvm:ir
#136864 opened Apr 23, 2025 by Meinersbur Loading…
7
[docs] Reorder metadata examples in note llvm:ir
#136859 opened Apr 23, 2025 by amordo Loading…
2
[llvm][docs] Remove unnecessary apostrophe llvm:ir
#136844 opened Apr 23, 2025 by fpekal Loading…
2
[NVPTX] Add fma mix precision intrinsics backend:NVPTX llvm:ir
#136661 opened Apr 22, 2025 by rajatbajpai Loading…
2
[NVPTX] Add mix precision arith intrinsics backend:NVPTX llvm:ir
#136657 opened Apr 22, 2025 by rajatbajpai Loading…
6
Bundle operands to specify denormal modes llvm:adt llvm:analysis llvm:instcombine llvm:ir llvm:transforms
#136501 opened Apr 20, 2025 by spavloff Loading…
@spavloff
8
Add constrained fadd to FP operations llvm:ir
#136499 opened Apr 20, 2025 by spavloff Loading…
@spavloff
1
AMDGPU: Add noundef to mbcnt intrinsic returns backend:AMDGPU llvm:ir
#136304 opened Apr 18, 2025 by arsenm Loading…
5
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