From a3d80615ba4343d9c80ed913879921ff952839d6 Mon Sep 17 00:00:00 2001 From: Baoshan Pang Date: Mon, 21 Apr 2025 14:56:52 -0700 Subject: [PATCH] [AMDGPU] remove move instruction if there is no user of it For instruction sequence: move t, x move x, y mov y, t Enhance matchSwap so that 'move t, x' can be removed. --- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b16.ll | 7 +++---- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 9 +-------- 3 files changed, 5 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp index 73343e1c80f33..be07e88e87851 100644 --- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp +++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp @@ -797,7 +797,7 @@ MachineInstr *SIShrinkInstructions::matchSwap(MachineInstr &MovT) const { dropInstructionKeepingImpDefs(*MovY); MachineInstr *Next = &*std::next(MovT.getIterator()); - if (T.isVirtual() && MRI->use_nodbg_empty(T)) { + if (MRI->use_nodbg_empty(T)) { dropInstructionKeepingImpDefs(MovT); } else { Xop.setIsKill(false); diff --git a/llvm/test/CodeGen/AMDGPU/v_swap_b16.ll b/llvm/test/CodeGen/AMDGPU/v_swap_b16.ll index 79ec4b8831679..dbcfc8054a4c0 100644 --- a/llvm/test/CodeGen/AMDGPU/v_swap_b16.ll +++ b/llvm/test/CodeGen/AMDGPU/v_swap_b16.ll @@ -32,12 +32,11 @@ define half @swap(half %a, half %b, i32 %i) { ; GFX11-FAKE16-NEXT: s_mov_b32 s0, 0 ; GFX11-FAKE16-NEXT: .LBB0_1: ; %loop ; GFX11-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) -; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v2, -1, v2 +; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, -1, v2 ; GFX11-FAKE16-NEXT: v_swap_b32 v1, v0 +; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) ; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2 ; GFX11-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0 -; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) ; GFX11-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 ; GFX11-FAKE16-NEXT: s_cbranch_execnz .LBB0_1 ; GFX11-FAKE16-NEXT: ; %bb.2: ; %ret @@ -81,7 +80,7 @@ define half @swap(half %a, half %b, i32 %i) { ; GFX12-FAKE16-NEXT: s_mov_b32 s0, 0 ; GFX12-FAKE16-NEXT: .LBB0_1: ; %loop ; GFX12-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX12-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v2, -1, v2 +; GFX12-FAKE16-NEXT: v_add_nc_u32_e32 v2, -1, v2 ; GFX12-FAKE16-NEXT: v_swap_b32 v1, v0 ; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) ; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2 diff --git a/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir b/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir index 95aaea6ea8091..5cd395fb18074 100644 --- a/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir +++ b/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir @@ -1,11 +1,9 @@ # RUN: llc -simplify-mir -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s -# RUN: llc -simplify-mir -mtriple=amdgcn -mcpu=gfx900 -passes=si-shrink-instructions -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s # GCN-LABEL: name: swap_phys_condensed # GCN: bb.0: # GCN-NEXT: liveins: # GCN-NEXT: {{^[ ]*$}} -# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec # GCN-NEXT: S_SETPC_B64_return --- @@ -24,7 +22,6 @@ body: | # GCN: bb.0: # GCN-NEXT: liveins: # GCN-NEXT: {{^[ ]*$}} -# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec # GCN-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr4, implicit $exec # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec # GCN-NEXT: $vgpr5 = V_MOV_B32_e32 killed $vgpr6, implicit $exec @@ -47,7 +44,6 @@ body: | # GCN: bb.0: # GCN-NEXT: liveins: # GCN-NEXT: {{^[ ]*$}} -# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec # GCN-NEXT: S_SETPC_B64_return --- @@ -66,7 +62,6 @@ body: | # GCN: bb.0: # GCN-NEXT: liveins: # GCN-NEXT: {{^[ ]*$}} -# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec # GCN-NEXT: S_SETPC_B64_return --- @@ -85,7 +80,6 @@ body: | # GCN: bb.0: # GCN-NEXT: liveins: # GCN-NEXT: {{^[ ]*$}} -# GCN-NEXT: $vgpr4_vgpr5 = COPY $vgpr0_vgpr1 # GCN-NEXT: $vgpr0, $vgpr2 = V_SWAP_B32 $vgpr2, $vgpr0, implicit $exec # GCN-NEXT: $vgpr1, $vgpr3 = V_SWAP_B32 $vgpr3, $vgpr1, implicit $exec --- @@ -936,8 +930,7 @@ body: | ... # GCN-LABEL: implicit_ops_mov_t_swap_b32 -# GCN: $vgpr3 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $vgpr2, implicit killed $vgpr1_vgpr2, implicit-def $vgpr1 -# GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec +# GCN: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec --- name: implicit_ops_mov_t_swap_b32