From 54581a012f8052f7897a6733531adfabb2356a6a Mon Sep 17 00:00:00 2001 From: vikashgu Date: Thu, 24 Apr 2025 10:13:40 +0000 Subject: [PATCH] [AMDGPU][NFC] Added Pre-commit tests for #137137 This adds llc LIT test for vector fp16 operations like log, exp, etc. Its act as the pre-commit test for github PR#137137. --- llvm/test/CodeGen/AMDGPU/vector-fp16.ll | 2538 +++++++++++++++++++++++ 1 file changed, 2538 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/vector-fp16.ll diff --git a/llvm/test/CodeGen/AMDGPU/vector-fp16.ll b/llvm/test/CodeGen/AMDGPU/vector-fp16.ll new file mode 100644 index 0000000000000..274e50aae0230 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/vector-fp16.ll @@ -0,0 +1,2538 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX906 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX908 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx942 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX942 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10 %s +; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11 %s + +declare <1 x half> @llvm.sin.v1f16(<1 x half>) +declare <1 x half> @llvm.cos.v1f16(<1 x half>) +declare <1 x half> @llvm.log.v1f16(<1 x half>) +declare <1 x half> @llvm.log2.v1f16(<1 x half>) +declare <1 x half> @llvm.log10.v1f16(<1 x half>) +declare <1 x half> @llvm.exp.v1f16(<1 x half>) +declare <1 x half> @llvm.exp2.v1f16(<1 x half>) +declare <1 x half> @llvm.exp10.v1f16(<1 x half>) +declare <1 x half> @llvm.sqrt.v1f16(<1 x half>) + +declare <2 x half> @llvm.sin.v2f16(<2 x half>) +declare <2 x half> @llvm.cos.v2f16(<2 x half>) +declare <2 x half> @llvm.log.v2f16(<2 x half>) +declare <2 x half> @llvm.log2.v2f16(<2 x half>) +declare <2 x half> @llvm.log10.v2f16(<2 x half>) +declare <2 x half> @llvm.exp.v2f16(<2 x half>) +declare <2 x half> @llvm.exp2.v2f16(<2 x half>) +declare <2 x half> @llvm.exp10.v2f16(<2 x half>) +declare <2 x half> @llvm.sqrt.v2f16(<2 x half>) + +declare <4 x half> @llvm.sin.v4f16(<4 x half>) +declare <4 x half> @llvm.cos.v4f16(<4 x half>) +declare <4 x half> @llvm.log.v4f16(<4 x half>) +declare <4 x half> @llvm.log2.v4f16(<4 x half>) +declare <4 x half> @llvm.log10.v4f16(<4 x half>) +declare <4 x half> @llvm.exp.v4f16(<4 x half>) +declare <4 x half> @llvm.exp2.v4f16(<4 x half>) +declare <4 x half> @llvm.exp10.v4f16(<4 x half>) +declare <4 x half> @llvm.sqrt.v4f16(<4 x half>) + +declare <5 x half> @llvm.sin.v5f16(<5 x half>) +declare <5 x half> @llvm.cos.v5f16(<5 x half>) +declare <5 x half> @llvm.log.v5f16(<5 x half>) +declare <5 x half> @llvm.log2.v5f16(<5 x half>) +declare <5 x half> @llvm.log10.v5f16(<5 x half>) +declare <5 x half> @llvm.exp.v5f16(<5 x half>) +declare <5 x half> @llvm.exp2.v5f16(<5 x half>) +declare <5 x half> @llvm.exp10.v5f16(<5 x half>) +declare <5 x half> @llvm.sqrt.v5f16(<5 x half>) + + +define <1 x half> @sin_v1f16(<1 x half> %a) { +; GFX8-LABEL: sin_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sin_v1f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX9-NEXT: v_sin_f16_e32 v0, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sin_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sin_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.sin.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @cos_v1f16(<1 x half> %a) { +; GFX8-LABEL: cos_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_cos_f16_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: cos_v1f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX9-NEXT: v_cos_f16_e32 v0, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cos_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX10-NEXT: v_cos_f16_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cos_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_cos_f16_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.cos.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @log_v1f16(<1 x half> %a) { +; GFX8-LABEL: log_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: log_v1f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_log_f16_e32 v0, v0 +; GFX906-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: log_v1f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_log_f16_e32 v0, v0 +; GFX908-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: log_v1f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_log_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.log.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @log2_v1f16(<1 x half> %a) { +; GFX8-LABEL: log2_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log2_v1f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v0, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log2_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log2_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.log2.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @log10_v1f16(<1 x half> %a) { +; GFX8-LABEL: log10_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: log10_v1f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_log_f16_e32 v0, v0 +; GFX906-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: log10_v1f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_log_f16_e32 v0, v0 +; GFX908-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: log10_v1f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_log_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log10_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log10_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.log10.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @exp_v1f16(<1 x half> %a) { +; GFX8-LABEL: exp_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: exp_v1f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX906-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX906-NEXT: v_exp_f32_e32 v0, v0 +; GFX906-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: exp_v1f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX908-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX908-NEXT: v_exp_f32_e32 v0, v0 +; GFX908-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: exp_v1f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX942-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX942-NEXT: v_exp_f32_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.exp.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @exp2_v1f16(<1 x half> %a) { +; GFX8-LABEL: exp2_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_exp_f16_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp2_v1f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_exp_f16_e32 v0, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp2_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_exp_f16_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp2_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_exp_f16_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.exp2.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @exp10_v1f16(<1 x half> %a) { +; GFX8-LABEL: exp10_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: exp10_v1f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX906-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX906-NEXT: v_exp_f32_e32 v0, v0 +; GFX906-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: exp10_v1f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX908-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX908-NEXT: v_exp_f32_e32 v0, v0 +; GFX908-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: exp10_v1f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX942-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX942-NEXT: v_exp_f32_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp10_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp10_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.exp10.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <1 x half> @sqrt_v1f16(<1 x half> %a) { +; GFX8-LABEL: sqrt_v1f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sqrt_v1f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sqrt_v1f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sqrt_v1f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <1 x half> @llvm.sqrt.v1f16(<1 x half> %a) + ret <1 x half> %res +} + +define <2 x half> @sin_v2f16(<2 x half> %a) { +; GFX8-LABEL: sin_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v1, 0x3118 +; GFX8-NEXT: v_mul_f16_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_sin_f16_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: sin_v2f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX906-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX906-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX906-NEXT: v_sin_f16_e32 v1, v1 +; GFX906-NEXT: v_sin_f16_e32 v0, v0 +; GFX906-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: sin_v2f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX908-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX908-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX908-NEXT: v_sin_f16_e32 v1, v1 +; GFX908-NEXT: v_sin_f16_e32 v0, v0 +; GFX908-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: sin_v2f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX942-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX942-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX942-NEXT: v_sin_f16_e32 v1, v1 +; GFX942-NEXT: v_sin_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sin_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v1, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_sin_f16_e32 v1, v2 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sin_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_sin_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.sin.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @cos_v2f16(<2 x half> %a) { +; GFX8-LABEL: cos_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v1, 0x3118 +; GFX8-NEXT: v_mul_f16_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_cos_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cos_f16_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: cos_v2f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX906-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX906-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX906-NEXT: v_cos_f16_e32 v1, v1 +; GFX906-NEXT: v_cos_f16_e32 v0, v0 +; GFX906-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: cos_v2f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX908-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX908-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX908-NEXT: v_cos_f16_e32 v1, v1 +; GFX908-NEXT: v_cos_f16_e32 v0, v0 +; GFX908-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: cos_v2f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX942-NEXT: v_mul_f16_e32 v1, 0.15915494, v0 +; GFX942-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX942-NEXT: v_cos_f16_e32 v1, v1 +; GFX942-NEXT: v_cos_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cos_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v1, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_cos_f16_e32 v1, v2 +; GFX10-NEXT: v_cos_f16_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cos_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_cos_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_cos_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.cos.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @log_v2f16(<2 x half> %a) { +; GFX8-LABEL: log_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_mov_b32_e32 v2, 0x398c +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log_v2f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v1, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v1, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.log.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @log2_v2f16(<2 x half> %a) { +; GFX8-LABEL: log2_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: log2_v2f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX906-NEXT: v_log_f16_e32 v0, v0 +; GFX906-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: log2_v2f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX908-NEXT: v_log_f16_e32 v0, v0 +; GFX908-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: log2_v2f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX942-NEXT: v_log_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log2_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log2_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.log2.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @log10_v2f16(<2 x half> %a) { +; GFX8-LABEL: log10_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_mov_b32_e32 v2, 0x34d1 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log10_v2f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v1, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log10_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v1, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log10_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.log10.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @exp_v2f16(<2 x half> %a) { +; GFX8-LABEL: exp_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp_v2f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 :: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.exp.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @exp2_v2f16(<2 x half> %a) { +; GFX8-LABEL: exp2_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_exp_f16_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: exp2_v2f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX906-NEXT: v_exp_f16_e32 v0, v0 +; GFX906-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: exp2_v2f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX908-NEXT: v_exp_f16_e32 v0, v0 +; GFX908-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: exp2_v2f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX942-NEXT: v_exp_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp2_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_exp_f16_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp2_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_exp_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_exp_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.exp2.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @exp10_v2f16(<2 x half> %a) { +; GFX8-LABEL: exp10_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp10_v2f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp10_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp10_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 :: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.exp10.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <2 x half> @sqrt_v2f16(<2 x half> %a) { +; GFX8-LABEL: sqrt_v2f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX906-LABEL: sqrt_v2f16: +; GFX906: ; %bb.0: +; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX906-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX906-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX906-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX906-NEXT: s_setpc_b64 s[30:31] +; +; GFX908-LABEL: sqrt_v2f16: +; GFX908: ; %bb.0: +; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX908-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX908-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX908-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX908-NEXT: s_setpc_b64 s[30:31] +; +; GFX942-LABEL: sqrt_v2f16: +; GFX942: ; %bb.0: +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX942-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX942-NEXT: s_nop 0 +; GFX942-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX942-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sqrt_v2f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_sqrt_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sqrt_v2f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0 +; GFX11-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <2 x half> @llvm.sqrt.v2f16(<2 x half> %a) + ret <2 x half> %res +} + +define <4 x half> @sin_v4f16(<4 x half> %a) { +; GFX8-LABEL: sin_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v4, v4 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_e32 v2, v2 +; GFX8-NEXT: v_sin_f16_e32 v4, v4 +; GFX8-NEXT: v_sin_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_sin_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sin_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_sin_f16_e32 v2, v2 +; GFX9-NEXT: v_sin_f16_e32 v4, v4 +; GFX9-NEXT: v_sin_f16_e32 v0, v0 +; GFX9-NEXT: v_sin_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sin_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX10-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_sin_f16_e32 v2, v3 +; GFX10-NEXT: v_sin_f16_e32 v3, v4 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: v_sin_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sin_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_sin_f16_e32 v1, v1 +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_sin_f16_e32 v2, v2 +; GFX11-NEXT: v_sin_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.sin.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @cos_v4f16(<4 x half> %a) { +; GFX8-LABEL: cos_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v4, v4 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_cos_f16_e32 v2, v2 +; GFX8-NEXT: v_cos_f16_e32 v4, v4 +; GFX8-NEXT: v_cos_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cos_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: cos_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_cos_f16_e32 v2, v2 +; GFX9-NEXT: v_cos_f16_e32 v4, v4 +; GFX9-NEXT: v_cos_f16_e32 v0, v0 +; GFX9-NEXT: v_cos_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cos_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v2, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX10-NEXT: v_mul_f16_e32 v4, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_cos_f16_e32 v2, v3 +; GFX10-NEXT: v_cos_f16_e32 v3, v4 +; GFX10-NEXT: v_cos_f16_e32 v0, v0 +; GFX10-NEXT: v_cos_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cos_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_cos_f16_e32 v1, v1 +; GFX11-NEXT: v_cos_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_cos_f16_e32 v2, v2 +; GFX11-NEXT: v_cos_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.cos.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @log_v4f16(<4 x half> %a) { +; GFX8-LABEL: log_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v2, v1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v3, v0 +; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_mov_b32_e32 v4, 0x398c +; GFX8-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v3, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v2, v1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v3, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX9-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v2, v1 +; GFX10-NEXT: v_log_f16_e32 v3, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.log.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @log2_v4f16(<4 x half> %a) { +; GFX8-LABEL: log2_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_sdwa v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_log_f16_e32 v1, v1 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log2_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v0, v0 +; GFX9-NEXT: v_log_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log2_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: v_log_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log2_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.log2.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @log10_v4f16(<4 x half> %a) { +; GFX8-LABEL: log10_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v2, v1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v3, v0 +; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_mov_b32_e32 v4, 0x34d1 +; GFX8-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v3, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log10_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v2, v1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v3, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX9-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX9-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log10_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v2, v1 +; GFX10-NEXT: v_log_f16_e32 v3, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log10_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.log10.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @exp_v4f16(<4 x half> %a) { +; GFX8-LABEL: exp_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v2, v2 +; GFX8-NEXT: v_exp_f32_e32 v3, v3 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX8-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v3, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_exp_f32_e32 v2, v2 +; GFX9-NEXT: v_exp_f32_e32 v3, v3 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX9-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX10-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_exp_f32_e32 v2, v2 +; GFX10-NEXT: v_exp_f32_e32 v3, v3 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX10-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 :: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_dual_mul_f32 v2, 0x3fb8aa3b, v2 :: v_dual_mul_f32 v3, 0x3fb8aa3b, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_exp_f32_e32 v2, v2 +; GFX11-NEXT: v_exp_f32_e32 v3, v3 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX11-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.exp.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @exp2_v4f16(<4 x half> %a) { +; GFX8-LABEL: exp2_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_exp_f16_sdwa v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_exp_f16_sdwa v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_exp_f16_e32 v0, v0 +; GFX8-NEXT: v_exp_f16_e32 v1, v1 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp2_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_exp_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_exp_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_exp_f16_e32 v0, v0 +; GFX9-NEXT: v_exp_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp2_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_exp_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_exp_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_exp_f16_e32 v0, v0 +; GFX10-NEXT: v_exp_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp2_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_exp_f16_e32 v1, v1 +; GFX11-NEXT: v_exp_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_exp_f16_e32 v2, v2 +; GFX11-NEXT: v_exp_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.exp2.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @exp10_v4f16(<4 x half> %a) { +; GFX8-LABEL: exp10_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_exp_f32_e32 v2, v2 +; GFX8-NEXT: v_exp_f32_e32 v3, v3 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX8-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v3, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp10_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_exp_f32_e32 v2, v2 +; GFX9-NEXT: v_exp_f32_e32 v3, v3 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX9-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp10_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX10-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_exp_f32_e32 v2, v2 +; GFX10-NEXT: v_exp_f32_e32 v3, v3 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX10-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp10_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) +; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 :: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_dual_mul_f32 v2, 0x3fb8aa3b, v2 :: v_dual_mul_f32 v3, 0x3fb8aa3b, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_exp_f32_e32 v2, v2 +; GFX11-NEXT: v_exp_f32_e32 v3, v3 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX11-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.exp10.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <4 x half> @sqrt_v4f16(<4 x half> %a) { +; GFX8-LABEL: sqrt_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_sqrt_f16_sdwa v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_sqrt_f16_sdwa v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX8-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v2 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sqrt_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_sqrt_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_sqrt_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX9-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sqrt_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_sqrt_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_sqrt_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX10-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v2 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sqrt_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX11-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_sqrt_f16_e32 v2, v2 +; GFX11-NEXT: v_sqrt_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <4 x half> @llvm.sqrt.v4f16(<4 x half> %a) + ret <4 x half> %res +} + +define <5 x half> @sin_v5f16(<5 x half> %a) { +; GFX8-LABEL: sin_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v4, 0x3118 +; GFX8-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX8-NEXT: v_fract_f16_e32 v3, v3 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v5, v5 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_e32 v3, v3 +; GFX8-NEXT: v_sin_f16_e32 v5, v5 +; GFX8-NEXT: v_sin_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_sin_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_sin_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v5, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sin_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v4, 0x3118 +; GFX9-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_sin_f16_e32 v3, v3 +; GFX9-NEXT: v_sin_f16_e32 v5, v5 +; GFX9-NEXT: v_sin_f16_e32 v0, v0 +; GFX9-NEXT: v_sin_f16_e32 v1, v1 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX9-NEXT: v_sin_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v5, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sin_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v4, 0.15915494, v1 +; GFX10-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_sin_f16_e32 v3, v4 +; GFX10-NEXT: v_sin_f16_e32 v4, v5 +; GFX10-NEXT: v_sin_f16_e32 v2, v2 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: v_sin_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sin_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX11-NEXT: v_sin_f16_e32 v1, v1 +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: v_sin_f16_e32 v2, v2 +; GFX11-NEXT: v_sin_f16_e32 v3, v3 +; GFX11-NEXT: v_sin_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.sin.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @cos_v5f16(<5 x half> %a) { +; GFX8-LABEL: cos_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_mov_b32_e32 v4, 0x3118 +; GFX8-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX8-NEXT: v_fract_f16_e32 v3, v3 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v5, v5 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_cos_f16_e32 v3, v3 +; GFX8-NEXT: v_cos_f16_e32 v5, v5 +; GFX8-NEXT: v_cos_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cos_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_cos_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v5, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: cos_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_mov_b32_e32 v4, 0x3118 +; GFX9-NEXT: v_mul_f16_e32 v3, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_cos_f16_e32 v3, v3 +; GFX9-NEXT: v_cos_f16_e32 v5, v5 +; GFX9-NEXT: v_cos_f16_e32 v0, v0 +; GFX9-NEXT: v_cos_f16_e32 v1, v1 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX9-NEXT: v_cos_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v5, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cos_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_mov_b32_e32 v3, 0x3118 +; GFX10-NEXT: v_mul_f16_e32 v4, 0.15915494, v1 +; GFX10-NEXT: v_mul_f16_e32 v5, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX10-NEXT: v_cos_f16_e32 v3, v4 +; GFX10-NEXT: v_cos_f16_e32 v4, v5 +; GFX10-NEXT: v_cos_f16_e32 v2, v2 +; GFX10-NEXT: v_cos_f16_e32 v0, v0 +; GFX10-NEXT: v_cos_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cos_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX11-NEXT: v_cos_f16_e32 v1, v1 +; GFX11-NEXT: v_cos_f16_e32 v0, v0 +; GFX11-NEXT: v_cos_f16_e32 v2, v2 +; GFX11-NEXT: v_cos_f16_e32 v3, v3 +; GFX11-NEXT: v_cos_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.cos.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @log_v5f16(<5 x half> %a) { +; GFX8-LABEL: log_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v3, v1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v4, v0 +; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v2, v2 +; GFX8-NEXT: v_mov_b32_e32 v5, 0x398c +; GFX8-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v4, 0x398c, v4 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v3, v1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v4, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v2, v2 +; GFX9-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX9-NEXT: v_mul_f16_e32 v4, 0x398c, v4 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX9-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v3, v1 +; GFX10-NEXT: v_log_f16_e32 v4, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v2, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX10-NEXT: v_mul_f16_e32 v4, 0x398c, v4 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_log_f16_e32 v4, v4 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x398c, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0x398c, v0 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v2, 0x398c, v2 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v3, 0x398c, v3 +; GFX11-NEXT: v_mul_f16_e32 v4, 0x398c, v4 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.log.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @log2_v5f16(<5 x half> %a) { +; GFX8-LABEL: log2_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_sdwa v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_log_f16_e32 v1, v1 +; GFX8-NEXT: v_log_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log2_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v0, v0 +; GFX9-NEXT: v_log_f16_e32 v1, v1 +; GFX9-NEXT: v_log_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log2_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v0, v0 +; GFX10-NEXT: v_log_f16_e32 v1, v1 +; GFX10-NEXT: v_log_f16_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log2_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_log_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.log2.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @log10_v5f16(<5 x half> %a) { +; GFX8-LABEL: log10_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v3, v1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v4, v0 +; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v2, v2 +; GFX8-NEXT: v_mov_b32_e32 v5, 0x34d1 +; GFX8-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v4, 0x34d1, v4 +; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD +; GFX8-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: log10_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v3, v1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v4, v0 +; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v2, v2 +; GFX9-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX9-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX9-NEXT: v_mul_f16_e32 v4, 0x34d1, v4 +; GFX9-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX9-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: log10_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v3, v1 +; GFX10-NEXT: v_log_f16_e32 v4, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v2, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX10-NEXT: v_mul_f16_e32 v4, 0x34d1, v4 +; GFX10-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: log10_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_log_f16_e32 v4, v4 +; GFX11-NEXT: v_mul_f16_e32 v1, 0x34d1, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0x34d1, v0 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_mul_f16_e32 v2, 0x34d1, v2 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v3, 0x34d1, v3 +; GFX11-NEXT: v_mul_f16_e32 v4, 0x34d1, v4 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.log10.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @exp_v5f16(<5 x half> %a) { +; GFX8-LABEL: exp_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX8-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX8-NEXT: v_exp_f32_e32 v3, v3 +; GFX8-NEXT: v_exp_f32_e32 v4, v4 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_exp_f32_e32 v2, v2 +; GFX8-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX8-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX9-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX9-NEXT: v_exp_f32_e32 v3, v3 +; GFX9-NEXT: v_exp_f32_e32 v4, v4 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_exp_f32_e32 v2, v2 +; GFX9-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX9-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX10-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX10-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX10-NEXT: v_exp_f32_e32 v3, v3 +; GFX10-NEXT: v_exp_f32_e32 v4, v4 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_exp_f32_e32 v2, v2 +; GFX10-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX10-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v3 +; GFX11-NEXT: v_cvt_f32_f16_e32 v4, v4 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 :: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_dual_mul_f32 v2, 0x3fb8aa3b, v2 :: v_dual_mul_f32 v3, 0x3fb8aa3b, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: v_exp_f32_e32 v2, v2 +; GFX11-NEXT: v_exp_f32_e32 v3, v3 +; GFX11-NEXT: v_exp_f32_e32 v4, v4 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX11-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.exp.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @exp2_v5f16(<5 x half> %a) { +; GFX8-LABEL: exp2_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_exp_f16_sdwa v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_exp_f16_sdwa v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_exp_f16_e32 v0, v0 +; GFX8-NEXT: v_exp_f16_e32 v1, v1 +; GFX8-NEXT: v_exp_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp2_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_exp_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_exp_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_exp_f16_e32 v0, v0 +; GFX9-NEXT: v_exp_f16_e32 v1, v1 +; GFX9-NEXT: v_exp_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp2_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_exp_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_exp_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_exp_f16_e32 v0, v0 +; GFX10-NEXT: v_exp_f16_e32 v1, v1 +; GFX10-NEXT: v_exp_f16_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp2_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_exp_f16_e32 v1, v1 +; GFX11-NEXT: v_exp_f16_e32 v0, v0 +; GFX11-NEXT: v_exp_f16_e32 v2, v2 +; GFX11-NEXT: v_exp_f16_e32 v3, v3 +; GFX11-NEXT: v_exp_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.exp2.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @exp10_v5f16(<5 x half> %a) { +; GFX8-LABEL: exp10_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX8-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX8-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX8-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX8-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX8-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX8-NEXT: v_exp_f32_e32 v3, v3 +; GFX8-NEXT: v_exp_f32_e32 v4, v4 +; GFX8-NEXT: v_exp_f32_e32 v0, v0 +; GFX8-NEXT: v_exp_f32_e32 v1, v1 +; GFX8-NEXT: v_exp_f32_e32 v2, v2 +; GFX8-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX8-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX8-NEXT: v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 +; GFX8-NEXT: v_or_b32_e32 v1, v3, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: exp10_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX9-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX9-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX9-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX9-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX9-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX9-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX9-NEXT: v_exp_f32_e32 v3, v3 +; GFX9-NEXT: v_exp_f32_e32 v4, v4 +; GFX9-NEXT: v_exp_f32_e32 v0, v0 +; GFX9-NEXT: v_exp_f32_e32 v1, v1 +; GFX9-NEXT: v_exp_f32_e32 v2, v2 +; GFX9-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX9-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: exp10_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v4, v0 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX10-NEXT: v_mul_f32_e32 v3, 0x3fb8aa3b, v3 +; GFX10-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX10-NEXT: v_mul_f32_e32 v0, 0x3fb8aa3b, v0 +; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fb8aa3b, v1 +; GFX10-NEXT: v_mul_f32_e32 v2, 0x3fb8aa3b, v2 +; GFX10-NEXT: v_exp_f32_e32 v3, v3 +; GFX10-NEXT: v_exp_f32_e32 v4, v4 +; GFX10-NEXT: v_exp_f32_e32 v0, v0 +; GFX10-NEXT: v_exp_f32_e32 v1, v1 +; GFX10-NEXT: v_exp_f32_e32 v2, v2 +; GFX10-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX10-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: exp10_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v1, v1 +; GFX11-NEXT: v_cvt_f32_f16_e32 v0, v0 +; GFX11-NEXT: v_cvt_f32_f16_e32 v2, v2 +; GFX11-NEXT: v_cvt_f32_f16_e32 v3, v3 +; GFX11-NEXT: v_cvt_f32_f16_e32 v4, v4 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fb8aa3b, v1 :: v_dual_mul_f32 v0, 0x3fb8aa3b, v0 +; GFX11-NEXT: v_dual_mul_f32 v2, 0x3fb8aa3b, v2 :: v_dual_mul_f32 v3, 0x3fb8aa3b, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) +; GFX11-NEXT: v_mul_f32_e32 v4, 0x3fb8aa3b, v4 +; GFX11-NEXT: v_exp_f32_e32 v1, v1 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_exp_f32_e32 v0, v0 +; GFX11-NEXT: v_exp_f32_e32 v2, v2 +; GFX11-NEXT: v_exp_f32_e32 v3, v3 +; GFX11-NEXT: v_exp_f32_e32 v4, v4 +; GFX11-NEXT: v_cvt_f16_f32_e32 v1, v1 +; GFX11-NEXT: v_cvt_f16_f32_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) +; GFX11-NEXT: v_cvt_f16_f32_e32 v2, v2 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_cvt_f16_f32_e32 v3, v3 +; GFX11-NEXT: v_cvt_f16_f32_e32 v4, v4 +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.exp10.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <5 x half> @sqrt_v5f16(<5 x half> %a) { +; GFX8-LABEL: sqrt_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_sqrt_f16_sdwa v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_sqrt_f16_sdwa v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX8-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX8-NEXT: v_sqrt_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 +; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: sqrt_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_sqrt_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_sqrt_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX9-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX9-NEXT: v_sqrt_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX9-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: sqrt_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_sqrt_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_sqrt_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX10-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX10-NEXT: v_sqrt_f16_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v0, v4 +; GFX10-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: sqrt_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_sqrt_f16_e32 v1, v1 +; GFX11-NEXT: v_sqrt_f16_e32 v0, v0 +; GFX11-NEXT: v_sqrt_f16_e32 v2, v2 +; GFX11-NEXT: v_sqrt_f16_e32 v3, v3 +; GFX11-NEXT: v_sqrt_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %res = call <5 x half> @llvm.sqrt.v5f16(<5 x half> %a) + ret <5 x half> %res +} + +define <4 x half> @cascaded_v4f16(<4 x half> %a) { +; GFX8-LABEL: cascaded_v4f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_e32 v2, v1 +; GFX8-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX8-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX8-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_fract_f16_e32 v3, v3 +; GFX8-NEXT: v_sin_f16_e32 v2, v2 +; GFX8-NEXT: v_sin_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_sin_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: cascaded_v4f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_e32 v2, v1 +; GFX9-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v0, v0 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX9-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX9-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX9-NEXT: v_sin_f16_e32 v2, v2 +; GFX9-NEXT: v_sin_f16_e32 v0, v0 +; GFX9-NEXT: v_sin_f16_e32 v3, v3 +; GFX9-NEXT: v_sin_f16_e32 v1, v1 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cascaded_v4f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v2, v1 +; GFX10-NEXT: v_log_f16_e32 v3, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX10-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX10-NEXT: v_sin_f16_e32 v2, v2 +; GFX10-NEXT: v_sin_f16_e32 v3, v3 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: v_sin_f16_e32 v1, v1 +; GFX10-NEXT: v_pack_b32_f16 v0, v3, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cascaded_v4f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: v_sin_f16_e32 v1, v1 +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX11-NEXT: v_sin_f16_e32 v2, v2 +; GFX11-NEXT: v_sin_f16_e32 v3, v3 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v2 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v3 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %b = call <4 x half> @llvm.log2.v4f16(<4 x half> %a) + %res = call <4 x half> @llvm.sin.v4f16(<4 x half> %b) + ret <4 x half> %res +} + +define <5 x half> @cascaded_v5f16(<5 x half> %a) { +; GFX8-LABEL: cascaded_v5f16: +; GFX8: ; %bb.0: +; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX8-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v4, v1 +; GFX8-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX8-NEXT: v_log_f16_e32 v0, v0 +; GFX8-NEXT: v_log_f16_e32 v2, v2 +; GFX8-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX8-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX8-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX8-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX8-NEXT: v_fract_f16_e32 v4, v4 +; GFX8-NEXT: v_fract_f16_e32 v1, v1 +; GFX8-NEXT: v_fract_f16_e32 v0, v0 +; GFX8-NEXT: v_fract_f16_e32 v3, v3 +; GFX8-NEXT: v_sin_f16_e32 v4, v4 +; GFX8-NEXT: v_sin_f16_e32 v0, v0 +; GFX8-NEXT: v_sin_f16_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_sin_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD +; GFX8-NEXT: v_fract_f16_e32 v2, v2 +; GFX8-NEXT: v_sin_f16_e32 v2, v2 +; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 +; GFX8-NEXT: v_or_b32_e32 v1, v4, v1 +; GFX8-NEXT: s_setpc_b64 s[30:31] +; +; GFX9-LABEL: cascaded_v5f16: +; GFX9: ; %bb.0: +; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX9-NEXT: v_log_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v4, v1 +; GFX9-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX9-NEXT: v_log_f16_e32 v0, v0 +; GFX9-NEXT: v_log_f16_e32 v2, v2 +; GFX9-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX9-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX9-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX9-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX9-NEXT: v_sin_f16_e32 v4, v4 +; GFX9-NEXT: v_sin_f16_e32 v0, v0 +; GFX9-NEXT: v_sin_f16_e32 v3, v3 +; GFX9-NEXT: v_sin_f16_e32 v1, v1 +; GFX9-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX9-NEXT: v_sin_f16_e32 v2, v2 +; GFX9-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX9-NEXT: v_pack_b32_f16 v1, v4, v1 +; GFX9-NEXT: s_setpc_b64 s[30:31] +; +; GFX10-LABEL: cascaded_v5f16: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX10-NEXT: v_log_f16_e32 v3, v1 +; GFX10-NEXT: v_log_f16_e32 v4, v0 +; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 +; GFX10-NEXT: v_log_f16_e32 v2, v2 +; GFX10-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX10-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX10-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX10-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX10-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX10-NEXT: v_sin_f16_e32 v3, v3 +; GFX10-NEXT: v_sin_f16_e32 v4, v4 +; GFX10-NEXT: v_sin_f16_e32 v0, v0 +; GFX10-NEXT: v_sin_f16_e32 v1, v1 +; GFX10-NEXT: v_sin_f16_e32 v2, v2 +; GFX10-NEXT: v_pack_b32_f16 v0, v4, v0 +; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1 +; GFX10-NEXT: s_setpc_b64 s[30:31] +; +; GFX11-LABEL: cascaded_v5f16: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX11-NEXT: v_lshrrev_b32_e32 v3, 16, v0 +; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; GFX11-NEXT: v_log_f16_e32 v1, v1 +; GFX11-NEXT: v_log_f16_e32 v0, v0 +; GFX11-NEXT: v_log_f16_e32 v2, v2 +; GFX11-NEXT: v_log_f16_e32 v3, v3 +; GFX11-NEXT: v_log_f16_e32 v4, v4 +; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1 +; GFX11-NEXT: v_mul_f16_e32 v0, 0.15915494, v0 +; GFX11-NEXT: s_delay_alu instid0(TRANS32_DEP_3) +; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_mul_f16_e32 v3, 0.15915494, v3 +; GFX11-NEXT: v_mul_f16_e32 v4, 0.15915494, v4 +; GFX11-NEXT: v_sin_f16_e32 v1, v1 +; GFX11-NEXT: v_sin_f16_e32 v0, v0 +; GFX11-NEXT: v_sin_f16_e32 v2, v2 +; GFX11-NEXT: v_sin_f16_e32 v3, v3 +; GFX11-NEXT: v_sin_f16_e32 v4, v4 +; GFX11-NEXT: s_waitcnt_depctr 0xfff +; GFX11-NEXT: v_pack_b32_f16 v0, v0, v3 +; GFX11-NEXT: v_pack_b32_f16 v1, v1, v4 +; GFX11-NEXT: s_setpc_b64 s[30:31] + %b = call <5 x half> @llvm.log2.v5f16(<5 x half> %a) + %res = call <5 x half> @llvm.sin.v5f16(<5 x half> %b) + ret <5 x half> %res +}