diff --git a/llvm/lib/Target/LoongArch/CMakeLists.txt b/llvm/lib/Target/LoongArch/CMakeLists.txt index 62e5a0ab61b3f..17cde9c57e69a 100644 --- a/llvm/lib/Target/LoongArch/CMakeLists.txt +++ b/llvm/lib/Target/LoongArch/CMakeLists.txt @@ -6,9 +6,11 @@ tablegen(LLVM LoongArchGenAsmMatcher.inc -gen-asm-matcher) tablegen(LLVM LoongArchGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM LoongArchGenDAGISel.inc -gen-dag-isel) tablegen(LLVM LoongArchGenDisassemblerTables.inc -gen-disassembler) +tablegen(LLVM LoongArchGenGlobalISel.inc -gen-global-isel) tablegen(LLVM LoongArchGenInstrInfo.inc -gen-instr-info) tablegen(LLVM LoongArchGenMCPseudoLowering.inc -gen-pseudo-lowering) tablegen(LLVM LoongArchGenMCCodeEmitter.inc -gen-emitter) +tablegen(LLVM LoongArchGenRegisterBank.inc -gen-register-bank) tablegen(LLVM LoongArchGenRegisterInfo.inc -gen-register-info) tablegen(LLVM LoongArchGenSubtargetInfo.inc -gen-subtarget) @@ -16,13 +18,17 @@ add_public_tablegen_target(LoongArchCommonTableGen) add_llvm_target(LoongArchCodeGen LoongArchAsmPrinter.cpp + LoongArchCallLowering.cpp LoongArchExpandAtomicPseudoInsts.cpp LoongArchExpandPseudoInsts.cpp LoongArchFrameLowering.cpp LoongArchInstrInfo.cpp + LoongArchInstructionSelector.cpp LoongArchISelDAGToDAG.cpp LoongArchISelLowering.cpp + LoongArchLegalizerInfo.cpp LoongArchMCInstLower.cpp + LoongArchRegisterBankInfo.cpp LoongArchRegisterInfo.cpp LoongArchSubtarget.cpp LoongArchTargetMachine.cpp @@ -42,6 +48,7 @@ add_llvm_target(LoongArchCodeGen Support Target TargetParser + GlobalISel ADD_TO_COMPONENT LoongArch diff --git a/llvm/lib/Target/LoongArch/LoongArch.h b/llvm/lib/Target/LoongArch/LoongArch.h index 09ca089c91151..88873cd1711aa 100644 --- a/llvm/lib/Target/LoongArch/LoongArch.h +++ b/llvm/lib/Target/LoongArch/LoongArch.h @@ -20,7 +20,10 @@ namespace llvm { class AsmPrinter; class FunctionPass; +class InstructionSelector; class LoongArchTargetMachine; +class LoongArchRegisterBankInfo; +class LoongArchSubtarget; class MCInst; class MCOperand; class MachineInstr; @@ -41,6 +44,11 @@ void initializeLoongArchDAGToDAGISelPass(PassRegistry &); void initializeLoongArchExpandAtomicPseudoPass(PassRegistry &); void initializeLoongArchPreRAExpandPseudoPass(PassRegistry &); void initializeLoongArchExpandPseudoPass(PassRegistry &); + +InstructionSelector * +createLoongArchInstructionSelector(const LoongArchTargetMachine &, + LoongArchSubtarget &, + LoongArchRegisterBankInfo &); } // end namespace llvm #endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCH_H diff --git a/llvm/lib/Target/LoongArch/LoongArch.td b/llvm/lib/Target/LoongArch/LoongArch.td index 75b65fe69f262..121b49b7868ef 100644 --- a/llvm/lib/Target/LoongArch/LoongArch.td +++ b/llvm/lib/Target/LoongArch/LoongArch.td @@ -113,6 +113,7 @@ def FeatureRelax include "LoongArchRegisterInfo.td" include "LoongArchCallingConv.td" include "LoongArchInstrInfo.td" +include "LoongArchRegisterBanks.td" //===----------------------------------------------------------------------===// // LoongArch processors supported. diff --git a/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp new file mode 100644 index 0000000000000..7ec7fa09ed2b5 --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchCallLowering.cpp @@ -0,0 +1,52 @@ +//===-- LoongArchCallLowering.cpp - Call lowering ---------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +/// \file +/// This file implements the lowering of LLVM calls to machine code calls for +/// GlobalISel. +// +//===----------------------------------------------------------------------===// + +#include "LoongArchCallLowering.h" +#include "LoongArchISelLowering.h" +#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" + +using namespace llvm; + +LoongArchCallLowering::LoongArchCallLowering(const LoongArchTargetLowering &TLI) + : CallLowering(&TLI) {} + +bool LoongArchCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, + const Value *Val, + ArrayRef VRegs, + FunctionLoweringInfo &FLI, + Register SwiftErrorVReg) const { + + MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(LoongArch::PseudoRET); + + if (Val != nullptr) + return false; + + MIRBuilder.insertInstr(Ret); + return true; +} + +bool LoongArchCallLowering::lowerFormalArguments( + MachineIRBuilder &MIRBuilder, const Function &F, + ArrayRef> VRegs, FunctionLoweringInfo &FLI) const { + + if (F.arg_empty()) + return true; + + return false; +} + +bool LoongArchCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, + CallLoweringInfo &Info) const { + return false; +} diff --git a/llvm/lib/Target/LoongArch/LoongArchCallLowering.h b/llvm/lib/Target/LoongArch/LoongArchCallLowering.h new file mode 100644 index 0000000000000..53fcae70d94ce --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchCallLowering.h @@ -0,0 +1,44 @@ +//===-- LoongArchCallLowering.h - Call lowering -----------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +/// \file +/// This file describes how to lower LLVM calls to machine code calls. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H +#define LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H + +#include "llvm/CodeGen/CallingConvLower.h" +#include "llvm/CodeGen/GlobalISel/CallLowering.h" +#include "llvm/CodeGen/ValueTypes.h" + +namespace llvm { + +class LoongArchTargetLowering; + +class LoongArchCallLowering : public CallLowering { + +public: + LoongArchCallLowering(const LoongArchTargetLowering &TLI); + + bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, + ArrayRef VRegs, FunctionLoweringInfo &FLI, + Register SwiftErrorVReg) const override; + + bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, + ArrayRef> VRegs, + FunctionLoweringInfo &FLI) const override; + + bool lowerCall(MachineIRBuilder &MIRBuilder, + CallLoweringInfo &Info) const override; +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_LoongArch_LoongArchCALLLOWERING_H diff --git a/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp b/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp new file mode 100644 index 0000000000000..de12d990bffee --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchInstructionSelector.cpp @@ -0,0 +1,104 @@ +//===-- LoongArchInstructionSelector.cpp -------------------------*- C++ -*-==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file implements the targeting of the InstructionSelector class for +/// LoongArch. +/// \todo This should be generated by TableGen. +//===----------------------------------------------------------------------===// + +#include "LoongArchRegisterBankInfo.h" +#include "LoongArchSubtarget.h" +#include "LoongArchTargetMachine.h" +#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelector.h" +#include "llvm/IR/IntrinsicsLoongArch.h" +#include "llvm/Support/Debug.h" + +#define DEBUG_TYPE "loongarch-isel" + +using namespace llvm; + +#define GET_GLOBALISEL_PREDICATE_BITSET +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_PREDICATE_BITSET + +namespace { + +class LoongArchInstructionSelector : public InstructionSelector { +public: + LoongArchInstructionSelector(const LoongArchTargetMachine &TM, + const LoongArchSubtarget &STI, + const LoongArchRegisterBankInfo &RBI); + + bool select(MachineInstr &I) override; + static const char *getName() { return DEBUG_TYPE; } + +private: + bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const; + + const LoongArchSubtarget &STI; + const LoongArchInstrInfo &TII; + const LoongArchRegisterInfo &TRI; + const LoongArchRegisterBankInfo &RBI; + + // FIXME: This is necessary because DAGISel uses "Subtarget->" and GlobalISel + // uses "STI." in the code generated by TableGen. We need to unify the name of + // Subtarget variable. + const LoongArchSubtarget *Subtarget = &STI; + +#define GET_GLOBALISEL_PREDICATES_DECL +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_PREDICATES_DECL + +#define GET_GLOBALISEL_TEMPORARIES_DECL +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_TEMPORARIES_DECL +}; + +} // end anonymous namespace + +#define GET_GLOBALISEL_IMPL +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_IMPL + +LoongArchInstructionSelector::LoongArchInstructionSelector( + const LoongArchTargetMachine &TM, const LoongArchSubtarget &STI, + const LoongArchRegisterBankInfo &RBI) + : InstructionSelector(), STI(STI), TII(*STI.getInstrInfo()), + TRI(*STI.getRegisterInfo()), RBI(RBI), + +#define GET_GLOBALISEL_PREDICATES_INIT +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_PREDICATES_INIT +#define GET_GLOBALISEL_TEMPORARIES_INIT +#include "LoongArchGenGlobalISel.inc" +#undef GET_GLOBALISEL_TEMPORARIES_INIT +{ +} + +bool LoongArchInstructionSelector::select(MachineInstr &I) { + + if (!isPreISelGenericOpcode(I.getOpcode())) { + // Certain non-generic instructions also need some special handling. + return true; + } + + if (selectImpl(I, *CoverageInfo)) + return true; + + return false; +} + +namespace llvm { +InstructionSelector * +createLoongArchInstructionSelector(const LoongArchTargetMachine &TM, + LoongArchSubtarget &Subtarget, + LoongArchRegisterBankInfo &RBI) { + return new LoongArchInstructionSelector(TM, Subtarget, RBI); +} +} // end namespace llvm diff --git a/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp new file mode 100644 index 0000000000000..61a9b6e14db1f --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.cpp @@ -0,0 +1,23 @@ +//===-- LoongArchLegalizerInfo.cpp ------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file implements the targeting of the Machinelegalizer class for +/// LoongArch. \todo This should be generated by TableGen. +//===----------------------------------------------------------------------===// + +#include "LoongArchLegalizerInfo.h" +#include "llvm/CodeGen/TargetOpcodes.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/Type.h" + +using namespace llvm; + +LoongArchLegalizerInfo::LoongArchLegalizerInfo(const LoongArchSubtarget &ST) { + getLegacyLegalizerInfo().computeTables(); +} diff --git a/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h new file mode 100644 index 0000000000000..b651cff02a279 --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchLegalizerInfo.h @@ -0,0 +1,28 @@ +//===-- LoongArchLegalizerInfo.h --------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file declares the targeting of the Machinelegalizer class for +/// LoongArch. \todo This should be generated by TableGen. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchMACHINELEGALIZER_H +#define LLVM_LIB_TARGET_LoongArch_LoongArchMACHINELEGALIZER_H + +#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" + +namespace llvm { + +class LoongArchSubtarget; + +/// This class provides the information for the target register banks. +class LoongArchLegalizerInfo : public LegalizerInfo { +public: + LoongArchLegalizerInfo(const LoongArchSubtarget &ST); +}; +} // end namespace llvm +#endif diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp new file mode 100644 index 0000000000000..31b8f57739856 --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.cpp @@ -0,0 +1,26 @@ +//===-- LoongArchRegisterBankInfo.cpp ---------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file implements the targeting of the RegisterBankInfo class for +/// LoongArch. \todo This should be generated by TableGen. +//===----------------------------------------------------------------------===// + +#include "LoongArchRegisterBankInfo.h" +#include "MCTargetDesc/LoongArchMCTargetDesc.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/RegisterBank.h" +#include "llvm/CodeGen/RegisterBankInfo.h" +#include "llvm/CodeGen/TargetRegisterInfo.h" + +#define GET_TARGET_REGBANK_IMPL +#include "LoongArchGenRegisterBank.inc" + +using namespace llvm; + +LoongArchRegisterBankInfo::LoongArchRegisterBankInfo(unsigned HwMode) + : LoongArchGenRegisterBankInfo(HwMode) {} diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h new file mode 100644 index 0000000000000..61bf5d164a370 --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBankInfo.h @@ -0,0 +1,37 @@ +//===-- LoongArchRegisterBankInfo.h -----------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +/// \file +/// This file declares the targeting of the RegisterBankInfo class for +/// LoongArch. \todo This should be generated by TableGen. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_LoongArch_LoongArchREGISTERBANKINFO_H +#define LLVM_LIB_TARGET_LoongArch_LoongArchREGISTERBANKINFO_H + +#include "llvm/CodeGen/RegisterBankInfo.h" + +#define GET_REGBANK_DECLARATIONS +#include "LoongArchGenRegisterBank.inc" + +namespace llvm { + +class TargetRegisterInfo; + +class LoongArchGenRegisterBankInfo : public RegisterBankInfo { +protected: +#define GET_TARGET_REGBANK_CLASS +#include "LoongArchGenRegisterBank.inc" +}; + +/// This class provides the information for the target register banks. +class LoongArchRegisterBankInfo final : public LoongArchGenRegisterBankInfo { +public: + LoongArchRegisterBankInfo(unsigned HwMode); +}; +} // end namespace llvm +#endif diff --git a/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td b/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td new file mode 100644 index 0000000000000..c485c239dbb6a --- /dev/null +++ b/llvm/lib/Target/LoongArch/LoongArchRegisterBanks.td @@ -0,0 +1,15 @@ +//=- LoongArchRegisterBank.td - Describe the LoongArch Banks -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +/// General Purpose Registers: X. +def GPRBRegBank : RegisterBank<"GPRB", [GPR]>; + +def FPRBRegBank : RegisterBank<"FPRB", [FPR64]>; diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp index ffcde7dd1fa74..0ee3d62058903 100644 --- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.cpp @@ -11,7 +11,11 @@ //===----------------------------------------------------------------------===// #include "LoongArchSubtarget.h" +#include "LoongArchCallLowering.h" #include "LoongArchFrameLowering.h" +#include "LoongArchLegalizerInfo.h" +#include "LoongArchRegisterBankInfo.h" +#include "LoongArchTargetMachine.h" #include "MCTargetDesc/LoongArchBaseInfo.h" using namespace llvm; @@ -88,4 +92,28 @@ LoongArchSubtarget::LoongArchSubtarget(const Triple &TT, StringRef CPU, : LoongArchGenSubtargetInfo(TT, CPU, TuneCPU, FS), FrameLowering( initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)), - InstrInfo(*this), RegInfo(getHwMode()), TLInfo(TM, *this) {} + InstrInfo(*this), RegInfo(getHwMode()), TLInfo(TM, *this) { + CallLoweringInfo.reset(new LoongArchCallLowering(*getTargetLowering())); + Legalizer.reset(new LoongArchLegalizerInfo(*this)); + + auto *RBI = new LoongArchRegisterBankInfo(getHwMode()); + RegBankInfo.reset(RBI); + InstSelector.reset(createLoongArchInstructionSelector( + *static_cast(&TM), *this, *RBI)); +} + +const CallLowering *LoongArchSubtarget::getCallLowering() const { + return CallLoweringInfo.get(); +} + +InstructionSelector *LoongArchSubtarget::getInstructionSelector() const { + return InstSelector.get(); +} + +const LegalizerInfo *LoongArchSubtarget::getLegalizerInfo() const { + return Legalizer.get(); +} + +const RegisterBankInfo *LoongArchSubtarget::getRegBankInfo() const { + return RegBankInfo.get(); +} diff --git a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h index 5c173675cca4c..cdbabafe8cb32 100644 --- a/llvm/lib/Target/LoongArch/LoongArchSubtarget.h +++ b/llvm/lib/Target/LoongArch/LoongArchSubtarget.h @@ -18,6 +18,10 @@ #include "LoongArchInstrInfo.h" #include "LoongArchRegisterInfo.h" #include "MCTargetDesc/LoongArchBaseInfo.h" +#include "llvm/CodeGen/GlobalISel/CallLowering.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelector.h" +#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" +#include "llvm/CodeGen/RegisterBankInfo.h" #include "llvm/CodeGen/SelectionDAGTargetInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/DataLayout.h" @@ -109,6 +113,19 @@ class LoongArchSubtarget : public LoongArchGenSubtargetInfo { Align getPrefFunctionAlignment() const { return PrefFunctionAlignment; } Align getPrefLoopAlignment() const { return PrefLoopAlignment; } unsigned getMaxBytesForAlignment() const { return MaxBytesForAlignment; } + +protected: + // GlobalISel related APIs. + std::unique_ptr CallLoweringInfo; + std::unique_ptr InstSelector; + std::unique_ptr Legalizer; + std::unique_ptr RegBankInfo; + +public: + const CallLowering *getCallLowering() const override; + InstructionSelector *getInstructionSelector() const override; + const LegalizerInfo *getLegalizerInfo() const override; + const RegisterBankInfo *getRegBankInfo() const override; }; } // end namespace llvm diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp index a5a4d78aceeef..22c738e4aac83 100644 --- a/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp @@ -17,9 +17,14 @@ #include "MCTargetDesc/LoongArchBaseInfo.h" #include "TargetInfo/LoongArchTargetInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/CodeGen/GlobalISel/IRTranslator.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelect.h" +#include "llvm/CodeGen/GlobalISel/Legalizer.h" +#include "llvm/CodeGen/GlobalISel/RegBankSelect.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/TargetPassConfig.h" +#include "llvm/InitializePasses.h" #include "llvm/MC/TargetRegistry.h" #include "llvm/Support/CodeGen.h" #include "llvm/Transforms/Scalar.h" @@ -34,6 +39,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchTarget() { RegisterTargetMachine X(getTheLoongArch32Target()); RegisterTargetMachine Y(getTheLoongArch64Target()); auto *PR = PassRegistry::getPassRegistry(); + initializeGlobalISel(*PR); initializeLoongArchPreRAExpandPseudoPass(*PR); initializeLoongArchDAGToDAGISelPass(*PR); } @@ -143,6 +149,10 @@ class LoongArchPassConfig : public TargetPassConfig { void addIRPasses() override; bool addInstSelector() override; + bool addIRTranslator() override; + bool addLegalizeMachineIR() override; + bool addRegBankSelect() override; + bool addGlobalInstructionSelect() override; void addPreEmitPass() override; void addPreEmitPass2() override; void addPreRegAlloc() override; @@ -172,6 +182,26 @@ bool LoongArchPassConfig::addInstSelector() { return false; } +bool LoongArchPassConfig::addIRTranslator() { + addPass(new IRTranslator()); + return false; +} + +bool LoongArchPassConfig::addLegalizeMachineIR() { + addPass(new Legalizer()); + return false; +} + +bool LoongArchPassConfig::addRegBankSelect() { + addPass(new RegBankSelect()); + return false; +} + +bool LoongArchPassConfig::addGlobalInstructionSelect() { + addPass(new InstructionSelect()); + return false; +} + TargetTransformInfo LoongArchTargetMachine::getTargetTransformInfo(const Function &F) const { return TargetTransformInfo(LoongArchTTIImpl(this, F)); diff --git a/llvm/test/CodeGen/LoongArch/calllowering-ret.ll b/llvm/test/CodeGen/LoongArch/calllowering-ret.ll new file mode 100644 index 0000000000000..1626e8c739671 --- /dev/null +++ b/llvm/test/CodeGen/LoongArch/calllowering-ret.ll @@ -0,0 +1,18 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=loongarch32 -global-isel -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefix=LA32 %s +; RUN: llc -mtriple=loongarch64 -global-isel -verify-machineinstrs < %s \ +; RUN: | FileCheck -check-prefix=LA64 %s + +define void @foo() { +; LA32-LABEL: foo: +; LA32: # %bb.0: # %entry +; LA32-NEXT: ret +; +; LA64-LABEL: foo: +; LA64: # %bb.0: # %entry +; LA64-NEXT: ret + +entry: + ret void +} diff --git a/llvm/test/CodeGen/LoongArch/irtranslator-calllowering.ll b/llvm/test/CodeGen/LoongArch/irtranslator-calllowering.ll new file mode 100644 index 0000000000000..f957037e5c233 --- /dev/null +++ b/llvm/test/CodeGen/LoongArch/irtranslator-calllowering.ll @@ -0,0 +1,16 @@ +; RUN: llc -O0 --mtriple=loongarch32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \ +; RUN: | FileCheck %s -check-prefix=LA32 +; RUN: llc -O0 --mtriple=loongarch64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \ +; RUN: | FileCheck %s -check-prefix=LA64 + +define void @foo() { + ; LA32-LABEL: name: foo + ; LA32: bb.1.entry: + ; LA32-NEXT: PseudoRET + + ; LA64-LABEL: name: foo + ; LA64: bb.1.entry: + ; LA64-NEXT: PseudoRET +entry: + ret void +}