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doc: add supported sysfs for max42500
Add documentation for supported ABI sysfs entries for MAX42500. Signed-off-by: Kent Libetario <Kent.Libetario@analog.com>
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.. SPDX-License-Identifier: GPL-2.0-or-later
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Kernel driver max42500
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======================
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Supported chips:
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* Analog Devices MAX42500
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Prefix: 'max42500'
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Addresses scanned: I2C 0x28 to 0x2B
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Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/max42500.pdf
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Author: Kent Libetario <Kent.Libetario@analog.com>
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Description
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-----------
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This driver supports hardware monitoring of MAX42500 power system with up
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to seven voltage monitor inputs. Each input has programmable overvoltage
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(OV) and undervoltage (UV) thresholds where two of the inputs support
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dynamic voltage scaling (DVS). Additionally, the MAX42500 features a
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programmable flexible power sequence recorder that stores timestamps
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separately. And also, the MAX42500 has a programmable challenge and
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response watchdog with a configurable RESET output.
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Usage Notes
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-----------
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This driver does not auto-detect devices. You will have to instantiate the
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devices explicitly. Please see Documentation/i2c/instantiating-devices.rst
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for details.
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Due to its multi-functionality, the MAX42500 is split into three drivers:
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the mfd driver as the main device, and the hwmon and watchdog drivers as
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the sub-devices. The mfd driver is a client to the core driver and
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consumed by both the hwmon and watchdog drivers.
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Optionally, two power management GPIOs are provided by the mfd driver and
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consumed only by the hwmon sub-device driver. The pins are fixed-outputs
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to control the voltage monitor comparators and trigger the power sequence
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timestamp recording of the device. Please see the datasheet for details.
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For the two GPIO output pins to be consumed, the device tree will look
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like this:
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.. code-block::
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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poweroff-gpios
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sleepoff-gpios
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hwmon@28 {
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compatible = "adi,max42500";
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reg = <0x28>;
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};
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};
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Otherwise, the two pins maybe omitted in the device tree if unused.
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Platform data support
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---------------------
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The Hwmon driver supports standard Hwmon ABI driver and sysfs platform
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data. While the watchdog driver supports the standard watchdog ABI driver
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and sysfs platform data.
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Hwmon Sysfs entries
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-------------------
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The following attributes are supported. Limits are read-write; all other
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attributes are read-only.
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Chip
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~~~~
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======================= =======================================================
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chip_pec Enable or disable PEC: PECE bit in CONFIG1 register
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======================= =======================================================
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In
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~~
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======================= ======================================================
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in[1-7]_label "VMON[1-7]"
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in[1-7]_enable Enable or disable voltage monitors: VM1 to VM7 bits of
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VMON register
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in[1-5]_min Nominal Voltage set point: VIN1 to VIN5 registers
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in[1-5]_lcrit IN1-IN5 UV threshold: UV1 to UV5 nibbles of OVUV1 to
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OVUV5 registers
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in[6-7]_lcrit IN6-IN7 UV threshold: VINU6 to VINU7 registers
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in[1-5]_crit IN1-IN5 OV threshold: OV1 to OV5 nibbles of OVUV1 to
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OVUV5 registers
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in[6-7]_crit IN6-IN7 OV threshold: VINO6 to VINO7 registers
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in[1-7]_reset_history Enable or disable reset mapping: IN1 to IN7 bits of
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RSTMAP register
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======================= ======================================================
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Power
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~~~~~
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=============================== ===============================================
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power[1-7]_label "STATUS[1-7]"
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power_enable OFF comparator status: STATOFF register
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power_lcrit_alarm UV comparator status: STATUV register
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power_crit_alarm OV comparator status: STATOV register
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power[1-7]_average_interval_min Power-Down sequence time-stamp: DTIME1 to
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DTIME7 registers
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power[1-7]_average_interval_max Power-Up sequence time-stamp: UTIME1 to
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UTIME7 registers
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=============================== ===============================================
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Watchdog Sysfs entries
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----------------------
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======================= =======================================================
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start Enable the watchdog: WDEN bit of WDCFG2 register
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stop Disable the watchdog: WDEN bit of WDCFG2 register
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ping Set the watchdog key to the device: WDKEY register
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status Watchdog status: WDSTAT register
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set_timeout Watchdog Clock Divider: WDIV bits of WDCDIV register
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set_pretimeout First Update Extension: 1UD bit of WDCFG2 register
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restart Reset Hold or Active Timeout: RHLD bits of RSTCTRL
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register
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======================= =======================================================
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..

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