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Simple UART for FPGA v1.0
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@jakubcabal jakubcabal released this 27 May 19:23
· 36 commits to master since this release
v1.0
88ad2a3
  • Very simple and clean UART controller design.
  • Controller was simulated and tested on hardware.
  • Configurable parity and baud rate.
  • Loopback example.
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