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[SelectionDAG] Convert to or mask if all insertions are -1
backend:AArch64
backend:X86
llvm:SelectionDAG
SelectionDAGISel as well
#138213
opened May 1, 2025 by
AZero13
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[HLSL] Implement the Headers provided by Clang, e.g. for intrinsics
clang
Clang issues not falling into any other category
HLSL
HLSL Language Support
ldexp
intrinsic
backend:X86
clang:headers
#138182
opened May 1, 2025 by
kmpeng
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Missed combining shr and shrx in collatz_f1()
backend:X86
missed-optimization
#137983
opened Apr 30, 2025 by
BreadTom
[CodeGen][MachineLoop] Fix getLoopID
backend:X86
#137820
opened Apr 29, 2025 by
kortbeek-snps
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[SLP] -march=znver4 is slower than -march=znver3 on the znver4 series CPUs.
backend:X86
llvm:SLPVectorizer
#137808
opened Apr 29, 2025 by
dianqk
[clang][SPIRV] Add builtin for OpGenericCastToPtrExplicit and its SPIR-V friendly binding
backend:SPIR-V
backend:X86
clang:codegen
IR generation bugs: mangling, exceptions, etc.
clang:frontend
Language frontend issues, e.g. anything involving "Sema"
clang:headers
Headers provided by Clang, e.g. for intrinsics
clang
Clang issues not falling into any other category
#137805
opened Apr 29, 2025 by
Naghasan
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Revert "[InlineSpiller] Check rematerialization before folding operand (#134015)"
backend:X86
llvm:regalloc
#137801
opened Apr 29, 2025 by
arsenm
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[X86-64] 32-bit registers store variables of unsigned char type without zero extension
backend:X86
#137764
opened Apr 29, 2025 by
zhaojiangkun-1
[AVX-512]
vpsubd a, b, vpmovm2d
can be done via a masked vpsubd
backend:X86
missed-optimization
#137700
opened Apr 28, 2025 by
dzaima
[x86] Enable indirect tail calls with more arguments
backend:X86
#137643
opened Apr 28, 2025 by
zmodem
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[SelectionDAG] Make SelectionDAGISel as well
(a & x) | (~a & y) -> (a & (x ^ y)) ^ y
available for all targets
backend:AMDGPU
backend:NVPTX
backend:RISC-V
backend:SystemZ
backend:WebAssembly
backend:X86
llvm:SelectionDAG
#137641
opened Apr 28, 2025 by
el-ev
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[CodeGen] Port gc-empty-basic-blocks to new pass manager
backend:X86
llvm:codegen
#137585
opened Apr 28, 2025 by
paperchalice
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[X86][BreakFalseDeps] Using reverse order for undef register selection
backend:X86
llvm:regalloc
tablegen
#137569
opened Apr 28, 2025 by
phoebewang
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[AVX-512]
vpternlog
can be used even when a subexpression is consumed
backend:X86
#137520
opened Apr 27, 2025 by
Validark
[clang] __MMX__ defined on non-SSE2 x86 targets
backend:X86
clang:driver
'clang' and 'clang++' user-facing binaries. Not 'clang-cl'
#137484
opened Apr 27, 2025 by
thrimbor
[X86] Suboptimal code for AVX-512 narrowing / blended permutex2var
backend:X86
missed-optimization
#137422
opened Apr 26, 2025 by
dzaima
[X86][GlobalISel] - Legalize And Select of G_FPTOSI/G_SITOFP in X87 mode
backend:X86
llvm:globalisel
#137377
opened Apr 25, 2025 by
pawan-nirpal-031
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[NFC][LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code.
backend:X86
#137331
opened Apr 25, 2025 by
paulwalker-arm
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[X86] foldMemoryOperandCustom - attempt to load-fold with a VEXTRACTF128/I128 into a regular load
backend:X86
#137316
opened Apr 25, 2025 by
RKSimon
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SelectionDAG: Support nofpclass with zero/pzero/nzero
backend:X86
llvm:SelectionDAG
SelectionDAGISel as well
#137305
opened Apr 25, 2025 by
wzssyqa
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[X86][LV] Zen4: Loop Vectorization with masked memops slower than scalar
backend:X86
vectorizers
#137213
opened Apr 24, 2025 by
mcinally
[AVX-512] Fused-load doesn't work for
<8 x i64>{ (PowerOf2 - 1), 0, 0, 0, 0, 0, 0, 0 }
backend:X86
#136750
opened Apr 22, 2025 by
Validark
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