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Fixed vec_pack_to_short_fp32 in Clang altivec.h #129923

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10 changes: 3 additions & 7 deletions clang/lib/Headers/altivec.h
Original file line number Diff line number Diff line change
Expand Up @@ -7529,13 +7529,9 @@ vec_pack(vector double __a, vector double __b) {
#ifdef __POWER9_VECTOR__
static __inline__ vector unsigned short __ATTRS_o_ai
vec_pack_to_short_fp32(vector float __a, vector float __b) {
vector float __resa = __builtin_vsx_xvcvsphp(__a);
vector float __resb = __builtin_vsx_xvcvsphp(__b);
#ifdef __LITTLE_ENDIAN__
return (vector unsigned short)vec_mergee(__resa, __resb);
#else
return (vector unsigned short)vec_mergeo(__resa, __resb);
#endif
vector unsigned int __resa = (vector unsigned int)__builtin_vsx_xvcvsphp(__a);
vector unsigned int __resb = (vector unsigned int)__builtin_vsx_xvcvsphp(__b);
return vec_pack(__resa, __resb);
}

#endif
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8 changes: 6 additions & 2 deletions clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
Original file line number Diff line number Diff line change
Expand Up @@ -853,10 +853,14 @@ vector unsigned char test73(void) {
vector unsigned short test74(void) {
// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
// CHECK-BE: @llvm.ppc.altivec.vperm
// CHECK-BE: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
// CHECK-BE-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <8 x i16>
// CHECK-BE-NEXT: ret <8 x i16> [[REG1]]
// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
// CHECK: @llvm.ppc.altivec.vperm
// CHECK: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
// CHECK-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <8 x i16>
// CHECK-NEXT: ret <8 x i16> [[REG1]]
return vec_pack_to_short_fp32(vfa, vfb);
}
vector unsigned int test75(void) {
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