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ELF: Add support for R_AARCH64_INST32 relocation. #133534
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base: users/pcc/spr/main.elf-add-support-for-r_aarch64_inst32-relocation
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ELF: Add support for R_AARCH64_INST32 relocation. #133534
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Created using spr 1.3.6-beta.1
@llvm/pr-subscribers-llvm-binary-utilities @llvm/pr-subscribers-lld Author: Peter Collingbourne (pcc) ChangesThe R_AARCH64_INST32 relocation type is to support deactivation TODO:
Full diff: https://github.com/llvm/llvm-project/pull/133534.diff 2 Files Affected:
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 9538dd4a70bae..110d087230a9c 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -135,6 +135,7 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
switch (type) {
case R_AARCH64_ABS16:
case R_AARCH64_ABS32:
+ case R_AARCH64_INST32:
case R_AARCH64_ABS64:
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST128_ABS_LO12_NC:
@@ -278,6 +279,7 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
case R_AARCH64_PREL16:
return SignExtend64<16>(read16(ctx, buf));
case R_AARCH64_ABS32:
+ case R_AARCH64_INST32:
case R_AARCH64_PREL32:
return SignExtend64<32>(read32(ctx, buf));
case R_AARCH64_ABS64:
@@ -505,6 +507,12 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
checkIntUInt(ctx, loc, val, 32, rel);
write32(ctx, loc, val);
break;
+ case R_AARCH64_INST32:
+ if (!rel.sym->isUndefined()) {
+ checkIntUInt(ctx, loc, val, 32, rel);
+ write32(ctx, loc, val);
+ }
+ break;
case R_AARCH64_PLT32:
case R_AARCH64_GOTPCREL32:
checkInt(ctx, loc, val, 32, rel);
diff --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
index 05b79eae573f7..c9f17ee4e0c7a 100644
--- a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
@@ -61,6 +61,7 @@ ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
ELF_RELOC(R_AARCH64_PLT32, 0x13a)
ELF_RELOC(R_AARCH64_GOTPCREL32, 0x13b)
+ELF_RELOC(R_AARCH64_INST32, 0x13c)
// General dynamic TLS relocations
ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)
|
@llvm/pr-subscribers-lld-elf Author: Peter Collingbourne (pcc) ChangesThe R_AARCH64_INST32 relocation type is to support deactivation TODO:
Full diff: https://github.com/llvm/llvm-project/pull/133534.diff 2 Files Affected:
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 9538dd4a70bae..110d087230a9c 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -135,6 +135,7 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
switch (type) {
case R_AARCH64_ABS16:
case R_AARCH64_ABS32:
+ case R_AARCH64_INST32:
case R_AARCH64_ABS64:
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST128_ABS_LO12_NC:
@@ -278,6 +279,7 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
case R_AARCH64_PREL16:
return SignExtend64<16>(read16(ctx, buf));
case R_AARCH64_ABS32:
+ case R_AARCH64_INST32:
case R_AARCH64_PREL32:
return SignExtend64<32>(read32(ctx, buf));
case R_AARCH64_ABS64:
@@ -505,6 +507,12 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
checkIntUInt(ctx, loc, val, 32, rel);
write32(ctx, loc, val);
break;
+ case R_AARCH64_INST32:
+ if (!rel.sym->isUndefined()) {
+ checkIntUInt(ctx, loc, val, 32, rel);
+ write32(ctx, loc, val);
+ }
+ break;
case R_AARCH64_PLT32:
case R_AARCH64_GOTPCREL32:
checkInt(ctx, loc, val, 32, rel);
diff --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
index 05b79eae573f7..c9f17ee4e0c7a 100644
--- a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
@@ -61,6 +61,7 @@ ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
ELF_RELOC(R_AARCH64_PLT32, 0x13a)
ELF_RELOC(R_AARCH64_GOTPCREL32, 0x13b)
+ELF_RELOC(R_AARCH64_INST32, 0x13c)
// General dynamic TLS relocations
ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)
|
Apologies for the delay in responding, just come back from vacation. Not had a chance to look through the Discourse posts yet, will do so this week. While it may seem a bit premature, would you be able to open an issue in the AArch64 ABI (https://github.com/ARM-software/abi-aa/issues) with a request to add a new relocation directive, citing the Discourse posts and PRs? |
Sure, created ARM-software/abi-aa#317 |
The R_AARCH64_INST32 relocation type is to support deactivation symbols. For more information, see the RFC: https://discourse.llvm.org/t/rfc-deactivation-symbols/85556 TODO: - Agree on semantics and relocation type number. - Add tests. Pull Request: llvm#133534
The R_AARCH64_INST32 relocation type is to support deactivation symbols. For more information, see the RFC: https://discourse.llvm.org/t/rfc-deactivation-symbols/85556 TODO: - Agree on semantics and relocation type number. - Add tests. Pull Request: llvm#133534
The R_AARCH64_INST32 relocation type is to support deactivation
symbols. For more information, see the RFC:
https://discourse.llvm.org/t/rfc-deactivation-symbols/85556
TODO: