Skip to content

implemented eltwise 'Equal' operation #30293

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 3 commits into
base: master
Choose a base branch
from

Conversation

madhurthareja
Copy link

Details:

  • Implement CPU plugin just-in-time emitter for Equal operation

Tickets:

  • 30257

@madhurthareja madhurthareja requested review from a team as code owners April 23, 2025 13:45
@github-actions github-actions bot added the category: CPU OpenVINO CPU plugin label Apr 23, 2025
@sys-openvino-ci sys-openvino-ci added the ExternalPR External contributor label Apr 23, 2025
@rkazants
Copy link
Member

build_jenkins

Copy link
Contributor

@a-sidorova a-sidorova left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@madhurthareja thank you for the contribution! Please take a look at the left comments and fix them.

If you have some questions regarding build and launching tests, please feel free to ask them. But firstly please read the documentation - how to cross-compile OpenVINO for RISC-V and use emulator.

Comment on lines +176 to +177
// Use the RISC-V vector instruction for equality comparison
h->vmseq_vv(dst, src0, src1); // Set dst[i] = 1 if src0[i] == src1[i], else 0
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

You're closer to the right implementation! But:

  • The current JIT emitter should work with FP32 values (floating points values). We should use instructions which works with such values (not integer). Please take a look at section "13.13. Vector Floating-Point Compare Instructions" in the doc. Currently you use vmseq instruction which should be used for comparison of integer values. Please replace it with correct instruction.
  • Also since we work with FP32 values here, the destination vector should store values in FP32 format where True = 1 = 0x3f800000 and False = 0 = 0x0. Please take a look at he impl on ARM64 using SIMD. It might be useful for you.
  • Some hint: probably you need to use mask vector register (mask_vreg())

Comment on lines +254 to +257
void emit_impl(const std::vector<size_t>& in_vec_idxs, const std::vector<size_t>& out_vec_idxs) const override;

template <ov::intel_cpu::riscv64::cpu_isa_t isa>
void emit_isa(const std::vector<size_t>& in_vec_idxs, const std::vector<size_t>& out_vec_idxs) const;
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

These methods should be in private section. Please take a look at other classes in this file and fix it.

Comment on lines +259 to +260
std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node) override;
};
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This method should be static and cannot be 'override'. Please take a look at other classes in this file and fix it.

Comment on lines +399 to +405
template <>
struct EltwiseEmitter<jit_equal_emitter> {
void operator()(EltwiseEmitterContext& ctx) {
ctx.emitter = std::make_shared<jit_equal_emitter>(ctx.host, ctx.host_isa, ctx.opData, ctx.exec_prc);
}
};
}
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

You don't need to specialize template for jit_equal_emitter because you don't need to pass some special parameters to constructor (for example, JIT emitters for ADD, SUB don't have specializations). Please remove it.

@@ -228,7 +228,8 @@ std::string ActivationLayerCPUTest::getPrimitiveType(const utils::ActivationType
#endif
#if defined(OPENVINO_ARCH_RISCV64)
if (ov::intel_cpu::riscv64::mayiuse(ov::intel_cpu::riscv64::gv)) {
if ((activation_type == utils::ActivationTypes::Clamp) ||
if ((activation_type == utils::ActivationTypes::Equal) ||
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Equal is missed in ov::test::utils::ActivationTypes. It's defined in ov::test::utils::ComparisonTypes. So you don't need to update this file. All related tests to Equal are defined here. And you don't need to update something there - just please launch tests with --gtest_filter="*smoke*Comparison*Equal*" 😊

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
category: CPU OpenVINO CPU plugin ExternalPR External contributor platform: risc-v OpenVINO on RISC-V
Projects
None yet
Development

Successfully merging this pull request may close these issues.

[Good First Issue] [RISCV64]: Implement CPU plugin just-in-time emitter for Equal operation
5 participants