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mcux-sdk-ng/driver: Roll back the cache64 driver version #527

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mcux-sdk-ng/driver: Roll back the cache64 driver version #527

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20 changes: 10 additions & 10 deletions mcux/mcux-sdk-ng/drivers/cache/cache64/fsl_cache.c
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Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ volatile uint8_t g_cache64MemPhyAliasId = 0U;
******************************************************************************/
#if (defined(FSL_FEATURE_SOC_CACHE64_POLSEL_COUNT) && (FSL_FEATURE_SOC_CACHE64_POLSEL_COUNT > 0))
/*!
* brief Returns an instance number given peripheral base address.
* brief Returns an instance number given periphearl base address.
*
* param base The peripheral base address.
* return CACHE64_POLSEL instance number starting from 0.
Expand Down Expand Up @@ -239,10 +239,10 @@ void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)
{
if (size_byte > 0UL)
{
uint32_t endAddr = MSDK_REG_SECURE_ADDR(address + size_byte - 0x01U);
uint32_t endAddr = MSDK_REG_NONSECURE_ADDR(address + size_byte - 0x01U);
uint32_t pccReg = 0;
/* Align address to cache line size. */
uint32_t startAddr = MSDK_REG_SECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t startAddr = MSDK_REG_NONSECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t instance = CACHE64_GetInstanceByAddr(address);
uint32_t endLim;
CACHE64_CTRL_Type *base;
Expand All @@ -256,7 +256,7 @@ void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)
return;
}
base = s_cache64ctrlBases[instance];
endLim = MSDK_REG_SECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endLim = MSDK_REG_NONSECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endAddr = endAddr > endLim ? endLim : endAddr;

/* Set the invalidate by line command and use the physical address. */
Expand Down Expand Up @@ -309,10 +309,10 @@ void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)
{
if (size_byte > 0UL)
{
uint32_t endAddr = MSDK_REG_SECURE_ADDR(address + size_byte - 0x01U);
uint32_t endAddr = MSDK_REG_NONSECURE_ADDR(address + size_byte - 0x01U);
uint32_t pccReg = 0;
/* Align address to cache line size. */
uint32_t startAddr = MSDK_REG_SECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t startAddr = MSDK_REG_NONSECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t instance = CACHE64_GetInstanceByAddr(address);
uint32_t endLim;
CACHE64_CTRL_Type *base;
Expand All @@ -326,7 +326,7 @@ void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)
return;
}
base = s_cache64ctrlBases[instance];
endLim = MSDK_REG_SECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endLim = MSDK_REG_NONSECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endAddr = endAddr > endLim ? endLim : endAddr;

/* Set the push by line command. */
Expand Down Expand Up @@ -381,10 +381,10 @@ void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)
{
if (size_byte > 0UL)
{
uint32_t endAddr = MSDK_REG_SECURE_ADDR(address + size_byte - 0x01U);
uint32_t endAddr = MSDK_REG_NONSECURE_ADDR(address + size_byte - 0x01U);
uint32_t pccReg = 0;
/* Align address to cache line size. */
uint32_t startAddr = MSDK_REG_SECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t startAddr = MSDK_REG_NONSECURE_ADDR(address & ~((uint32_t)CACHE64_LINESIZE_BYTE - 1U));
uint32_t instance = CACHE64_GetInstanceByAddr(address);
uint32_t endLim;
CACHE64_CTRL_Type *base;
Expand All @@ -398,7 +398,7 @@ void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)
return;
}
base = s_cache64ctrlBases[instance];
endLim = MSDK_REG_SECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endLim = MSDK_REG_NONSECURE_ADDR(phyMemBase[instance][g_cache64MemPhyAliasId] + phyMemSize[instance][g_cache64MemPhyAliasId] - 0x01U);
endAddr = endAddr > endLim ? endLim : endAddr;

/* Set the push by line command. */
Expand Down
4 changes: 2 additions & 2 deletions mcux/mcux-sdk-ng/drivers/cache/cache64/fsl_cache.h
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Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@
/*! @name Driver version */
/*! @{ */
/*! @brief cache driver version. */
#define FSL_CACHE_DRIVER_VERSION (MAKE_VERSION(2, 0, 9))
#define FSL_CACHE_DRIVER_VERSION (MAKE_VERSION(2, 0, 8))
/*! @} */

/*! @brief cache line size. */
Expand Down Expand Up @@ -70,7 +70,7 @@ extern "C" {

#if (defined(FSL_FEATURE_SOC_CACHE64_POLSEL_COUNT) && (FSL_FEATURE_SOC_CACHE64_POLSEL_COUNT > 0))
/*!
* @brief Returns an instance number given peripheral base address.
* @brief Returns an instance number given periphearl base address.
*
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peripheral is not typo

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i just rolled back the driver to version 2.0.8

* @param base The peripheral base address.
* @return CACHE64_POLSEL instance number starting from 0.
Expand Down